Datasheet 搜索 > 时钟缓冲器、驱动器、锁相环 > ADI（亚德诺） > ADCLK905BCPZ-R2 数据手册 > ADCLK905BCPZ-R2 数据手册 3/16 页
器件3D模型￥ 0.145
ADCLK905BCPZ-R2 数据手册 - ADI（亚德诺）
制造商:
ADI（亚德诺）
分类:
时钟缓冲器、驱动器、锁相环
封装:
LFCSP-16
描述:
时钟缓冲器 Ultrafast SiGe ECL
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P6P7Hot
典型应用电路图在P1P12
原理图在P11P13
封装尺寸在P14
型号编码规则在P14
功能描述在P1P6P7
技术参数、封装参数在P1P3P5
应用领域在P1P11
电气规格在P3P8
导航目录
ADCLK905BCPZ-R2数据手册
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of 16 Go
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ADCLK905/ADCLK907/ADCLK925
Rev. 0 | Page 3 of 16
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
Typical (Typ) values are given for V
CC
− V
EE
= 3.3 V and T
A
= 25°C, unless otherwise noted. Minimum (Min) and maximum (Max) values are
given over the full V
CC
− V
EE
= 3.3 V ± 10% and T
A
= −40°C to +125°C variation, unless otherwise noted.
Table 1.
Parameter Symbol Min Typ Max Unit Conditions
DC INPUT CHARACTERISTICS
Input Voltage High Level V
IH
V
EE
+ 1.6 V
CC
V
Input Voltage Low Level V
IL
V
EE
V
CC
− 0.7 V
Input Differential Range V
ID
0.2 3.4 V p-p −40°C to +85°C
(±1.7 V between input pins)
V
ID
0.2 2.8 V p-p 85°C to 125°C
(±1.4 V between input pins)
Input Capacitance C
IN
0.4 pF
Input Resistance, Single-Ended Mode 50 Ω
Input Resistance, Differential Mode 100 Ω
Input Resistance, Common Mode 50 kΩ Open V
T
Input Bias Current 20 μA
DC OUTPUT CHARACTERISTICS
Output Voltage High Level V
OH
V
CC
− 1.26 V
CC
− 0.76 V 50 Ω to (V
CC
− 2.0 V)
Output Voltage Low Level V
OL
V
CC
− 1.99 V
CC
− 1.54 V 50 Ω to (V
CC
− 2.0 V)
Output Voltage Differential V
OD
610 1040 mV 50 Ω to (V
CC
− 2.0 V)
Reference Voltage V
REF
Output Voltage (V
CC
+ 1)/2 V −500 μA to +500 μA
Output Resistance 250 Ω
AC PERFORMANCE
Propagation Delay t
PD
70 95 125 ps V
CC
= 3.3 V ± 10%,
V
ICM
= V
REF
, V
ID
= 0.5 V p-p
70 95 125 ps V
CC
= 2.5 V ± 5%,
V
ICM
= V
REF
, V
ID
= 0.5 V p-p
Propagation Delay Temperature Coefficient 50 fs/°C
Propagation Delay Skew (Output to Output)
ADCLK907
15 ps V
ID
= 0.5 V
Propagation Delay Skew (Output to Output)
ADCLK925
10 ps V
ID
= 0.5 V
Propagation Delay Skew (Device to Device) 35 ps V
ID
= 0.5 V
Toggle Rate 6 7.5 GHz >0.8 V differential output swing,
V
CC
= 3.3 V ± 10%
6.5 GHz >0.8 V differential output swing,
V
CC
= 2.5 V ± 5%
Random Jitter RJ 60 fs rms V
ID
= 1600 mV, 8 V/ns, V
ICM
= 1.85 V
Rise/Fall Time t
R
/t
F
30 85 ps 20%/80%
Additive Phase Noise
622.08 MHz −138 dBc/Hz @10 Hz offset
−144 dBc/Hz @100 Hz offset
−152 dBc/Hz @1 kHz offset
−159 dBc/Hz @10 kHz offset
−161 dBc/Hz @100 kHz offset
−161 dBc/Hz >1 MHz offset
122.88 MHz −135 dBc/Hz @10 Hz offset
−145 dBc/Hz @100 Hz offset
−153 dBc/Hz @1 kHz offset
−160 dBc/Hz @10 kHz offset
−161 dBc/Hz @100 kHz offset
−161 dBc/Hz >1 MHz offset
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