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MC14014BF 开发手册 - ON Semiconductor(安森美)
制造商:
ON Semiconductor(安森美)
分类:
移位寄存器
封装:
SOIC-16
描述:
8位的静态移位寄存器 8-Bit Static Shift Register
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P1Hot
典型应用电路图在P2
封装尺寸在P7
焊盘布局在P7
型号编码规则在P1P6P7
标记信息在P1P7
封装信息在P6
技术参数、封装参数在P6
应用领域在P1P6
电气规格在P3
型号编号列表在P1
导航目录
MC14014BF数据手册
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© Semiconductor Components Industries, LLC, 2014
July, 2014 − Rev. 9
1 Publication Order Number:
MC14014B/D
MC14014B, MC14021B
8-Bit Static Shift Register
The MC14014B and MC14021B 8−bit static shift registers are
constructed with MOS P−channel and N−channel enhancement mode
devices in a single monolithic structure. These shift registers find primary
use in parallel−to−serial data conversion, synchronous and asynchronous
parallel input, serial output data queueing; and other general purpose
register applications requiring low power and/or high noise immunity.
Features
• Synchronous Parallel Input/Serial Output (MC14014B)
• Asynchronous Parallel Input/Serial Output (MC14021B)
• Synchronous Serial Input/Serial Output
• Full Static Operation
• “Q” Outputs from Sixth, Seventh, and Eighth Stages
• Double Diode Input Protection
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low−power TTL Loads or One Low−power
Schottky TTL Load Over the Rated Temperature Range
• MC14014B Pin−for−Pin Replacement for CD4014B
• MC14021B Pin−for−Pin Replacement for CD4021B
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• This Device is Pb−Free and is RoHS Compliant
MAXIMUM RATINGS (Voltages Referenced to V
SS
)
Symbol
Parameter Value Unit
V
DD
DC Supply Voltage Range −0.5 to +18.0 V
V
in
, V
out
Input or Output Voltage Range
(DC or Transient)
−0.5 to V
DD
+ 0.5 V
I
in
, I
out
Input or Output Current
(DC or Transient) per Pin
± 10 mA
P
D
Power Dissipation, per Package
(Note 1)
500 mW
T
A
Ambient Temperature Range −55 to +125 °C
T
stg
Storage Temperature Range −65 to +150 °C
T
L
Lead Temperature
(8−Second Soldering)
260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Temperature Derating: “D/DW” Package: –7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V
in
and V
out
should be constrained
to the range V
SS
≤ (V
in
or V
out
) ≤ V
DD
.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either V
SS
or V
DD
). Unused outputs must be left open.
http://onsemi.com
MARKING DIAGRAM
SOIC−16
D SUFFIX
CASE 751B
140xxBG
AWLYWW
xx = Specific Device Code
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G = Pb−Free Indicator
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
ORDERING INFORMATION
1
16
PIN ASSIGNMENT
13
14
15
16
9
10
11
125
4
3
2
1
8
7
6
Q7
P5
P6
P7
V
DD
P/S
C
D
S
P4
Q8
Q6
P8
V
SS
P
1
P2
P3
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