Datasheet 搜索 > FPGA芯片 > Altera（阿尔特拉） > 5CSEBA6U23C7N 数据手册 > 5CSEBA6U23C7N 数据手册 6/96 页
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5CSEBA6U23C7N 数据手册 - Altera（阿尔特拉）
制造商:
Altera（阿尔特拉）
分类:
FPGA芯片
封装:
UBGA-672
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P16Hot
技术参数、封装参数在P1P2P11P12P13P15P16P18P19P22P23P24
电气规格在P1
导航目录
5CSEBA6U23C7N数据手册
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of 96 Go
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Symbol Description Condition Minimum
(2)
Typical Maximum
(2)
Unit
V
CCIO
I/O buffers power supply
3.3 V 3.135 3.3 3.465 V
3.0 V 2.85 3.0 3.15 V
2.5 V 2.375 2.5 2.625 V
1.8 V 1.71 1.8 1.89 V
1.5 V 1.425 1.5 1.575 V
1.35 V 1.283 1.35 1.418 V
1.25 V 1.19 1.25 1.31 V
1.2 V 1.14 1.2 1.26 V
V
CCPGM
Configuration pins power supply
3.3 V 3.135 3.3 3.465 V
3.0 V 2.85 3.0 3.15 V
2.5 V 2.375 2.5 2.625 V
1.8 V 1.71 1.8 1.89 V
V
CCA_FPLL
(5)
PLL analog voltage regulator power
supply
— 2.375 2.5 2.625 V
V
CCBAT
(6)
Battery back-up power supply
(For design security volatile key register)
— 1.2 — 3.0 V
V
I
DC input voltage — –0.5 — 3.6 V
V
O
Output voltage — 0 — VCCIO V
(2)
The power supply value describes the budget for the DC (static) power supply tolerance and does not include the dynamic tolerance requirements.
Refer to the PDN tool for the additional budget for the dynamic tolerance requirements.
(5)
PLL digital voltage is regulated from V
CCA_FPLL
.
(6)
If you do not use the design security feature in devices, connect V
CCBAT
to a 1.5-V, 2.5-V, or 3.0-V power supply. power-on reset (POR) circuitry
monitors V
CCBAT
. devices do not exit POR if V
CCBAT
is not powered up.
6
Recommended Operating Conditions
CV-51002
2016.06.10
Altera Corporation
Cyclone V Device Datasheet
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