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5CSEBA6U23C7SN 数据手册 - Altera（阿尔特拉）
制造商:
Altera（阿尔特拉）
分类:
FPGA芯片
封装:
UBGA-672
描述:
FPGA - 现场可编程门阵列 Cyclone V SE dual -core ARM Cortex-A9
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P16Hot
技术参数、封装参数在P1P2P11P12P13P15P16P18P19P22P23P24
电气规格在P1
导航目录
5CSEBA6U23C7SN数据手册
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若手册格式错乱，请下载阅览PDF原文件
Maximum Allowed Overshoot and Undershoot Voltage
During transitions, input signals may overshoot to the voltage listed in the following table and undershoot to –2.0 V for input currents less than
100 mA and periods shorter than 20 ns.
The maximum allowed overshoot duration is specified as a percentage of high time over the lifetime of the device. A DC signal is equivalent to
100% duty cycle.
For example, a signal that overshoots to 4.00 V can only be at 4.00 V for ~15% over the lifetime of the device; for a device lifetime of 10 years, this
amounts to 1.5 years.
CV-51002
2016.06.10
Maximum Allowed Overshoot and Undershoot Voltage
3
Cyclone V Device Datasheet
Altera Corporation
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