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74HC147D,653 数据手册 - NXP（恩智浦）
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NXP（恩智浦）
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逻辑控制器
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SOIC-16
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74HC147D,653数据手册
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December 1990 2
Philips Semiconductors Product specification
10-to-4 line priority encoder 74HC/HCT147
FEATURES
• Encodes 10-line decimal to 4-line BCD
• Useful for 10-position switch encoding
• Used in code converters and generators
• Output capability: standard
• I
CC
category: MSI
GENERAL DESCRIPTION
The 74HC/HCT147 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT147 9-input priority encoders accept data
from nine active LOW inputs (A
0
to A
8
) and provide a
binary representation on the four active LOW outputs
(Y
0
to Y
3
). A priority is assigned to each input so that when
two or more inputs are simultaneously active, the input
with the highest priority is represented on the output, with
input line A
8
having the highest priority.
The devices provide the 10-line to 4-line priority encoding
function by use of the implied decimal “zero”. The “zero” is
encoded when all nine data inputs are HIGH, forcing all
four outputs HIGH.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25 °C; t
r
= t
f
= 6 ns
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in µW):
P
D
= C
PD
× V
CC
2
× f
i
+∑(C
L
× V
CC
2
× f
o
) where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
∑ (C
L
× V
CC
2
× f
o
) = sum of outputs
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
2. For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
− 1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”
.
SYMBOL PARAMETER CONDITIONS
TYPICAL
UNIT
HC HCT
t
PHL
/ t
PLH
propagation delay A
n
to Y
n
C
L
= 15 pF; V
CC
= 5 V 15 17 ns
C
I
input capacitance 3.5 3.5 pF
C
PD
power dissipation capacitance per package notes 1 and 2 30 33 pF
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