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74HC390D,653 数据手册 - Nexperia（安世）
制造商:
Nexperia（安世）
封装:
SOIC-16
描述:
计数器 IC DUAL DECADE RIPPLE COUNTER
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74HC390D,653数据手册
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1. General description
The 74HC390; 74HCT390 is a dual 4-bit decade ripple counter divided into four
separately clocked sections. The counters have two divide-by-2 sections and two
divide-by-5 sections. These sections share an asynchronous master reset input (nMR)
and can be used in a BCD decade or bi-quinary configuration. If master reset inputs 1MR
and 2MR are used to clear all 8 bits of the counter simultaneously, numerous counting
configurations are possible within one package. Section clocks nCP
0 and nCP1, allow
ripple counter or frequency division applications of divide-by-2, 4, 5, 10, 20, 25, 50 or 100.
The HIGH-to-LOW transition of the clock inputs nCP
0 and nCP1 trigger each section. For
BCD decade operation, the nQ0 output is connected to the nCP
1 input of the divide-by-5
section. For bi-quinary decade operation, the nQ3 output is connected to the nCP
0 input
and nQ0 becomes the decade output. A HIGH on the nMR input overrides the clocks and
sets the four outputs LOW. Inputs include clamp diodes. It enables the use of current
limiting resistors to interface inputs to voltages in excess of V
CC
.
2. Features and benefits
Input levels:
For 74HC390: CMOS level
For 74HCT390: TTL level
Two BCD decade or bi-quinary counters
One device can be configured to divide-by-2, 4, 5, 10, 20, 25, 50 or 100
Two master reset inputs to clear each decade counter individually
Specified in compliance with JEDEC standard no. 7A
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 Cto+85C and from 40 Cto+125C
74HC390; 74HCT390
Dual decade ripple counter
Rev. 3 — 16 August 2016 Product data sheet
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