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A3P060-1VQ100I数据手册
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ProASIC3 Flash Family FPGAs
IV Revision 18
ProASIC3 Ordering Information
ProASIC3 Device Status
ProASIC3 Devices Status Cortex-M1 Devices Status
A3P015
Not recommended for new designs.
A3P030
Production
A3P060
Production
A3P125
Production
A3P250
Production M1A3P250 Production
A3P400
Production M1A3P400 Production
A3P600
Production M1A3P600 Production
A3P1000
Production M1A3P1000 Production
Speed Grade
Blank = Standard
1 = 15% Faster than Standard
2 = 25% Faster than Standard
A3P1000
FG
_
Part Number
ProASIC3 Devices
1
Package Type
VQ
=
Very Thin Quad Flat Pack (0.5 mm pitch)
QN
=
Quad Flat Pack No Leads (0.4 mm and 0.5 mm pitches)
TQ
=
Thin Quad Flat Pack (0.5 mm pitch)
144
Package Lead Count
G
Lead-Free Packaging
Blank = Standard Packaging
G= RoHS-Compliant (Green) Packaging (some packages also halogen-free)
30,000 System Gates
A3P030 =
15,000 System Gates (A3P015 is not recommended for new designs.)
A3P015 =
60,000 System Gates
A3P060 =
125,000 System Gates
A3P125 =
250,000 System Gates
A3P250 =
400,000 System Gates
A3P400 =
600,000 System Gates
A3P600 =
1,000,000 System Gates
A3P1000 =
ProASIC3 Devices with Cortex-M1
250,000 System Gates
M1A3P250 =
400,000 System Gates
M1A3P400 =
600,000 System Gates
M1A3P600 =
1,000,000 System Gates
M1A3P1000 =
PQ
=
Plastic Quad Flat Pack (0.5 mm pitch)
FG
=
Fine Pitch Ball Grid Array (1.0 mm pitch)
CS
=
Chip Scale Package (0.5 mm pitch)
Y
Security Feature
Y = Device Includes License to Implement IP Based on the
Cryptography Research, Inc. (CRI) Patent Portfolio
Blank = Device Does Not Include License to Implement IP Based
on the Cryptography Research, Inc. (CRI) Patent Portfolio
I
Application (Temperature Range)
Blank = Commercial (0°C to +85°C Junction Temperature)
I = Industrial (
40°C to +100°C Junction Temperature)
PP= Pre-Production
ES= Engineering Sample (Room Temperature Only)
Note: Only devices with packages greater than or equal to 5x5 are supported

A3P060-1VQ100I 数据手册

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221 页 / 6.32 MByte

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