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AD1938WBSTZRL 数据手册 - ADI（亚德诺）
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ADI（亚德诺）
封装:
LFQFP
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AD1938WBSTZRL数据手册
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4 ADC/8 DAC with PLL,
192 kHz, 24-Bit Codec
Data Sheet
AD1938
Rev. E Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2006–2013 Analog Devices, Inc. All rights reserved.
Technical Support www.analog.com
FEATURES
PLL generated or direct master clock
Low EMI design
108 dB DAC/107 dB ADC dynamic range and SNR
−94 dB THD + N
3.3 V single supply
Tolerance for 5 V logic inputs
Supports 24 bits and 8 kHz to 192 kHz sample rates
Differential ADC input
Single-ended DAC output
Log volume control with autoramp function
SPI controllable for flexibility
Software-controllable clickless mute
Software power-down
Right-justified, left-justified, I
2
S-justified, and TDM modes
Master and slave modes up to 16-channel input/output
48-lead LQFP package
Qualified for automotive applications
APPLICATIONS
Automotive audio systems
Home Theater Systems
Set-top boxes
Digital audio effects processors
GENERAL DESCRIPTION
The AD1938 is a high performance, single-chip codec that pro-
vides four analog-to-digital converters (ADCs) with input and
eight digital-to-analog converters (DACs) with single-ended output
using the Analog Devices, Inc., patented multibit sigma-delta (Σ-Δ)
architecture. An SPI port is included, allowing a microcontroller
to adjust volume and many other parameters.
The AD1938 operates from 3.3 V digital and analog supplies.
The AD1938 is available in a 48-lead (single-ended output)
LQFP package. Other members of this family include a diffe-
rential DAC output and I
2
C® control port version.
The AD1938 is designed for low EMI. This consideration is
apparent in both the system and circuit design architectures.
By using the on-board PLL to derive the master clock from
the LR clock or from an external crystal, the AD1938 elimi-
nates the need for a separate high frequency master clock and
can also be used with a suppressed bit clock. The DACs and
ADCs are designed using the latest Analog Devices continuous
time architectures to further minimize EMI. By using 3.3 V
supplies, power consumption is minimized, further reducing
emissions.
FUNCTIONAL BLOCK DIAGRAM
DIGITAL
FILTER
SERIAL DATA PORT
DIGITAL AUDIO
INPUT/OUTPUT
PRECISION
VOLTAGE
REFERENCE
TIMING MANAGEMENT
AND CONTROL
(CLOCK AND PLL)
SPI CONTROL PORT
CONTROL DATA
INPUT/OUTPUT
AD1938
ADC
ADC
ADC
ADC
ANALOG
AUDIO
INPUTS
ANALOG
AUDIO
OUTPUTS
DAC
DAC
DAC
DAC
DAC
DAC
DAC
DAC
DIGITAL
FILTER
AND
VOLUME
CONTROL
SDATA
OUT
SDATA
IN
CLOCKS
05582-001
Figure 1.
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