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AD5162BRMZ100 数据手册 - ADI（亚德诺）
制造商:
ADI（亚德诺）
分类:
数字电位器
封装:
MSOP-10
描述:
ANALOG DEVICES AD5162BRMZ100 易失性数字电位器, 100 kohm, 双, 3线, 串行, 线性, ± 20%, 2.7 V
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AD5162BRMZ100数据手册
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AD5162
Rev. C | Page 3 of 20
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS: 2.5 kΩ VERSION
V
DD
= 5 V ± 10%, or 3 V ± 10%; V
A
= V
DD
; V
B
= 0 V; −40°C < T
A
< +125°C; unless otherwise noted.
Table 1.
Parameter Symbol Conditions Min Typ
1
Max Unit
DC CHARACTERISTICS—RHEOSTAT MODE
Resistor Differential Nonlinearity
2
R-DNL R
WB
, V
A
= no connect −2 ±0.1 +2 LSB
Resistor Integral Nonlinearity
2
R-INL R
WB
, V
A
= no connect −14 ±2 +14 LSB
Nominal Resistor Tolerance
3
∆R
AB
T
A
= 25°C −20 +55 %
Resistance Temperature Coefficient (∆R
AB
/R
AB
)/∆T V
AB
= V
DD
, wiper = no connect 35 ppm/°C
Wiper Resistance R
WB
Code = 0x00, V
DD
= 5 V 160 200 Ω
DC CHARACTERISTICS—POTENTIOMETER
DIVIDER MODE
4
Differential Nonlinearity
5
DNL −1.5 ±0.1 +1.5 LSB
Integral Nonlinearity
5
INL −2 ±0.6 +2 LSB
Voltage Divider Temperature
Coefficient
(∆V
W
/V
W
)/∆T Code = 0x80 15 ppm/°C
Full-Scale Error V
WFSE
Code = 0xFF −14 −5.5 0 LSB
Zero-Scale Error V
WZSE
Code = 0x00 0 4.5 12 LSB
RESISTOR TERMINALS
Voltage Range
6
V
A
, V
B
, V
W
GND V
DD
V
Capacitance A, B
7
C
A
, C
B
f = 1 MHz, measured to GND,
code = 0x80
45 pF
Capacitance W
7
C
W
f = 1 MHz, measured to GND,
code = 0x80
60 pF
Common-Mode Leakage I
CM
V
A
= V
B
= V
DD
/2 1 nA
DIGITAL INPUTS AND OUTPUTS
Input Logic High V
IH
V
DD
= 5 V 2.4 V
Input Logic Low V
IL
V
DD
= 5 V 0.8 V
Input Logic High V
IH
V
DD
= 3 V 2.1 V
Input Logic Low V
IL
V
DD
= 3 V 0.6 V
Input Current I
IL
V
IN
= 0 V or 5 V ±1 µA
Input Capacitance
7
C
IL
5 pF
POWER SUPPLIES
Power Supply Range V
DD RANGE
2.7 5.5 V
Supply Current I
DD
V
IH
= 5 V or V
IL
= 0 V 3.5 6 µA
Power Dissipation
8
P
DISS
V
IH
= 5 V or V
IL
= 0 V, V
DD
= 5 V 30 µW
Power Supply Sensitivity PSS V
DD
= 5 V ± 10%, code = midscale ±0.02 ±0.08 %/%
DYNAMIC CHARACTERISTICS
9
Bandwidth, −3 dB BW Code = 0x80 4.8 MHz
Total Harmonic Distortion THD
W
V
A
= 1 V rms, V
B
= 0 V, f = 1 kHz 0.1 %
V
W
Settling Time t
S
V
A
= 5 V, V
B
= 0 V, ±1 LSB error band 1 µs
Resistor Noise Voltage Density e
N_WB
R
WB
= 1.25 kΩ, R
S
= 0 3.2 nV/√Hz
1
Typical specifications represent average readings at 25°C and V
DD
= 5 V.
2
Resistor position nonlinearity error, R-INL, is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from the ideal between successive tap positions. Parts are guaranteed monotonic.
3
V
A
= V
DD
, V
B
= 0 V, wiper (V
W
) = no connect.
4
Specifications apply to all VRs.
5
INL and DNL are measured at V
W
with the RDAC configured as a potentiometer divider similar to a voltage output DAC. V
A
= V
DD
and V
B
= 0 V.
DNL specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions.
6
Resistor Terminal A, Resistor Terminal B, and Resistor Terminal W have no limitations on polarity with respect to each other.
7
Guaranteed by design, but not subject to production test.
8
P
DISS
is calculated from (I
DD
× V
DD
). CMOS logic level inputs result in minimum power dissipation.
9
All dynamic characteristics use V
DD
= 5 V.
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