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AD9106数据手册
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AD9106 Data Sheet
Rev. A | Page 4 of 48
SPECIFICATIONS
DC SPECIFICATIONS (3.3 V)
T
MIN
to T
MAX
, AVDD = 3.3 V, DVDD = 3.3 V, CLKVDD = 3.3 V; internal CLDO, DLDO1, and DLDO2; I
OUTFS
= 4 mA, maximum sample rate,
unless otherwise noted.
Table 1.
Parameter Min Typ Max Unit
RESOLUTION 12 Bits
ACCURACY at 3.3 V
Differential Nonlinearity (DNL) ±0.4 LSB
Integral Nonlinearity (INL) ±0.5 LSB
DAC OUTPUTS
Offset Error ±.00025 % of FSR
Gain Error Internal ReferenceNo Automatic I
OUTFS
Calibration 1.0 +1.0 % of FSR
Full-Scale Output Current
1
at 3.3 V 2 4 8 mA
Output Resistance 200 MΩ
Output Compliance Voltage 0.5 +1.0 V
Crosstalk, DAC to DAC (f
OUT
= 10 MHz) 96 dBC
Crosstalk, DAC to DAC (f
OUT
= 60 MHz) 82 dBc
DAC TEMPERATURE DRIFT
Gain with Internal Reference ±251 ppm/°C
Internal Reference Voltage ±119 ppm/°C
REFERENCE OUTPUT
Internal Reference Voltage with AVDD = 3.3 V 0.8 1.0 1.2 V
Output Resistance 10 kΩ
REFERENCE INPUT
Voltage Compliance 0.1 1.25 V
Input Resistance External, Reference Mode 1 MΩ
DAC MATCHING
Gain MatchingNo Automatic I
OUTFS
Calibration ±0.75 % of FSR
1
Based on use of 8 kΩ external xR
SET
resistors.

AD9106 数据手册

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