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ADAU1761BCPZ-R7 数据手册 - ADI（亚德诺）
制造商:
ADI（亚德诺）
分类:
编解码器
封装:
LFCSP-32
描述:
的SigmaDSP立体声，低功耗， 96 kHz的24位音频编解码器集成PLL SigmaDSP Stereo, Low Power, 96 kHz, 24-Bit Audio Codec with Integrated PLL
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ADAU1761BCPZ-R7数据手册
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SigmaDSP Stereo, Low Power, 96 kHz,
24-Bit Audio Codec with Integrated PLL
ADAU1761
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2009–2010 Analog Devices, Inc. All rights reserved.
FEATURES
SigmaDSP 28-/56-bit, 50 MIPS digital audio processor
Fully programmable with SigmaStudio graphical tool
24-bit stereo audio ADC and DAC: >98 dB SNR
Sampling rates from 8 kHz to 96 kHz
Low power: 7 mW record, 7 mW playback, 48 kHz at 1.8 V
6 analog input pins, configurable for single-ended or
differential inputs
Flexible analog input/output mixers
Stereo digital microphone input
Analog outputs: 2 differential stereo, 2 single-ended stereo,
1 mono headphone output driver
PLL supporting input clocks from 8 MHz to 27 MHz
Analog automatic level control (ALC)
Microphone bias reference voltage
Analog and digital I/O: 1.8 V to 3.65 V
I
2
C and SPI control interfaces
Digital audio serial data I/O: stereo and time-division
multiplexing (TDM) modes
Software-controllable clickless mute
Software power-down
GPIO pins for digital controls and outputs
32-lead, 5 mm × 5 mm LFCSP
−40°C to +85°C operating temperature range
APPLICATIONS
Smartphones/multimedia phones
Digital still cameras/digital video cameras
Portable media players/portable audio players
Phone accessories products
GENERAL DESCRIPTION
The ADAU1761 is a low power, stereo audio codec with
integrated digital audio processing that supports stereo 48 kHz
record and playback at 14 mW from a 1.8 V analog supply. The
stereo audio ADCs and DACs support sample rates from 8 kHz
to 96 kHz as well as a digital volume control.
The SigmaDSP® core features 28-bit processing (56-bit double
precision). The processor allows system designers to compensate
for the real-world limitations of microphones, speakers, amplifiers,
and listening environments, resulting in a dramatic improvement
in the perceived audio quality through equalization, multiband
compression, limiting, and third-party branded algorithms.
The SigmaStudio™ graphical development tool is used to program
the ADAU1761. This software includes audio processing blocks
such as filters, dynamics processors, mixers, and low level DSP
functions for fast development of custom signal flows.
The record path includes an integrated microphone bias circuit
and six inputs. The inputs can be mixed and muxed before the
ADC, or they can be configured to bypass the ADC. The
ADAU1761 includes a stereo digital microphone input.
The ADAU1761 includes five high power output drivers (two
differential and three single-ended), supporting stereo head-
phones, an earpiece, or other output transducer. AC-coupled
or capless configurations are supported. Individual fine level
controls are supported on all analog outputs. The output mixer
stage allows for flexible routing of audio.
FUNCTIONAL BLOCK DIAGRAM
HP JACK
DETECTION
REGULATOR
INPUT
MIXERS
ALC
MICROPHONE
BIAS
PLL
LINN
LINP
LAUX
J
ACKDET/MICIN
RINP
RINN
RAUX
MICBIAS
LHP
LOUTN
LOUTP
ADAU1761
RHP
MONOOUT
ROUTP
ROUTN
CM
IOVDD
DGND
DVDDOUT
AGND
AVDD
AVDD
AGND
OUTPUT
MIXERS
DAC
DIGITAL
FILTERS
ADC
DIGITAL
FILTERS
DAC
DACADC
ADC
SDA/
COUT
I
2
C/SPI
CONTROL PORT
SERIAL DATA
INPUT/OUTPUT PORTS
MCLK
A
DC_SDATA/
GPIO1
BCLK/
GPIO2
SCL/
CCLK
ADDR1/
CDATA
ADDR0/
CLATCH
LRCLK/
GPIO3
DAC_SDATA/
GPIO0
07680-001
Figure 1.
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