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ADSP-BF514BBCZ-4 数据手册 - ADI（亚德诺）
制造商:
ADI（亚德诺）
分类:
DSP数字信号处理器
封装:
CSP-BGA
描述:
Blackfin嵌入式处理器 Blackfin Embedded Processor
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P59P60Hot
原理图在P1P6
封装尺寸在P28P65
型号编码规则在P23P28P67
功能描述在P3P12
技术参数、封装参数在P1P9P13P22P27P29P55P67
应用领域在P1
电气规格在P24P25P26P27
导航目录
ADSP-BF514BBCZ-4数据手册
Page:
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Blackfin and the Blackfin logo are registered trademarks of Analog Devices, Inc.
Blackfin
Embedded Processor
ADSP-BF512/BF514/BF514F16/BF516/BF518/BF518F16
Rev. D Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 U.S.A.
Tel: 781.329.4700 ©2014 Analog Devices, Inc. All rights reserved.
Technical Support www.analog.com
FEATURES
Up to 400 MHz high performance Blackfin processor
Two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs,
40-bit shifter
RISC-like register and instruction model for ease of
programming and compiler-friendly support
Advanced debug, trace, and performance monitoring
Wide range of operating voltages. See Operating Conditions
on Page 22
Qualified for Automotive Applications. See Automotive
Products on Page 67
168-ball CSP_BGA or 176-lead LQFP_EP (with exposed pad)
MEMORY
116K bytes of on-chip memory
External memory controller with glueless support for SDRAM
and asynchronous 8-bit and 16-bit memories
Optional 16M bit SPI flash with boot option
Flexible booting options from internal SPI flash, OTP
memory, external SPI/parallel memories, or from SPI/UART
host devices
Code security with Lockbox secure technology
One-time-programmable (OTP) memory
Memory management unit providing memory protection
PERIPHERALS
IEEE 802.3-compliant 10/100 Ethernet MAC with IEEE 1588
support (ADSP-BF518/ADSP-BF518F16 only)
Parallel peripheral interface (PPI), supporting ITU-R 656
video data formats
2 dual-channel, full-duplex synchronous serial ports
(SPORTs), supporting 8 stereo I
2
S channels
12 peripheral DMAs, 2 mastered by the Ethernet MAC
2 memory-to-memory DMAs with external request lines
Event handler with 56 interrupt inputs
2 serial peripheral interfaces (SPI)
Removable storage interface (RSI) controller for MMC, SD,
SDIO, and CE-ATA
2 UARTs with IrDA support
2-wire interface (TWI) controller
Eight 32-bit timers/counters with PWM support
3-phase 16-bit center-based PWM unit
32-bit general-purpose counter
Real-time clock (RTC) and watchdog timer
32-bit core timer
40 general-purpose I/Os (GPIOs)
Debug/JTAG interface
On-chip PLL capable of frequency multiplication
Figure 1. Functional Block Diagram
JTAG TEST AND EMULATION
PERIPHERAL
ACCESS BUS
OTP
3-PHASE PWM
WATCHDOG TIMERRTC
TWI
SPORT1-0
RSI (SDIO)
PPI
UART1–0
SPI0
16M bit SPI Flash
(See Table 1)
SPI1
TIMER7–0
COUNTER
EMAC
BOOT
ROM
DMA
EXTERNAL
BUS
INTERRUPT
CONTROLLER
DMA
CONTROLLER
L1
DATA
MEMORY
L1
INSTRUCTION
MEMORY
16
DMA CORE BUS
EXTERNAL ACCESS BUS
EXTERNAL PORT
FLASH, SDRAM CONTROL
PORTS
B
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