Datasheet 搜索 > 接口隔离器 > ADI（亚德诺） > ADUM1201BRZ 数据手册 > ADUM1201BRZ 数据手册 22/28 页
器件3D模型￥ 6.567
ADUM1201BRZ 数据手册 - ADI（亚德诺）
制造商:
ADI（亚德诺）
分类:
接口隔离器
封装:
SOIC-8
描述:
ANALOG DEVICES ADUM1201BRZ 数字隔离器, 双路, 2通道, 50 ns, 2.7 V, 5.5 V, SOIC, 8 引脚
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P22Hot
原理图在P1
封装尺寸在P27
型号编码规则在P1P27
封装信息在P19
功能描述在P1P22
技术参数、封装参数在P1P4P6P8P9P11P13P15P17P19P21P28
应用领域在P1P24P28
电气规格在P4P6P8P11P13P15P17P23
导航目录
ADUM1201BRZ数据手册
Page:
of 28 Go
若手册格式错乱，请下载阅览PDF原文件
ADuM1200/ADuM1201 Data Sheet
Rev. J | Page 22 of 28
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
1 8
2 7
3 6
4 5
TOP VIEW
(Not to Scale)
ADuM1200
0
4642-004
V
DD1
V
IA
V
IB
GND
1
V
DD2
V
OA
V
OB
GND
2
04642-005
1 8
2 7
3 6
4 5
TOP VIEW
(Not to Scale)
ADuM1201
V
DD1
V
OA
V
IB
GND
1
V
DD2
V
IA
V
OB
GND
2
Figure 4. ADuM1200 Pin Configuration Figure 5. ADuM1201 Pin Configuration
Table 15. ADuM1200 Pin Function Descriptions
Pin
No. Mnemonic Description
1 V
DD1
Supply Voltage for Isolator Side 1.
2 V
IA
Logic Input A.
3 V
IB
Logic Input B.
4 GND
1
Ground 1. Ground Reference for Isolator Side 1.
5 GND
2
Ground 2. Ground Reference for Isolator Side 2.
6 V
OB
Logic Output B.
7 V
OA
Logic Output A.
8 V
DD2
Supply Voltage for Isolator Side 2.
Table 16. ADuM1201 Pin Function Descriptions
Pin
No. Mnemonic Description
1 V
DD1
Supply Voltage for Isolator Side 1.
2 V
OA
Logic Output A.
3 V
IB
Logic Input B.
4 GND
1
Ground 1. Ground Reference for Isolator Side 1.
5 GND
2
Ground 2. Ground Reference for Isolator Side 2.
6 V
OB
Logic Output B.
7 V
IA
Logic Input A.
8 V
DD2
Supply Voltage for Isolator Side 2.
Table 17. ADuM1200 Truth Table (Positive Logic)
V
IA
Input V
IB
Input V
DD1
State V
DD2
State V
OA
Output V
OB
Output Notes
H H Powered Powered H H
L L Powered Powered L L
H L Powered Powered H L
L H Powered Powered L H
X X Unpowered Powered H H
Outputs return to the input state within
1 μs of V
DDI
power restoration.
X X Powered Unpowered Indeterminate Indeterminate
Outputs return to the input state within
1 μs of V
DDO
power restoration.
Table 18. ADuM1201 Truth Table (Positive Logic)
V
IA
Input V
IB
Input V
DD1
State V
DD2
State V
OA
Output V
OB
Output Notes
H H Powered Powered H H
L L Powered Powered L L
H L Powered Powered H L
L H Powered Powered L H
X X Unpowered Powered Indeterminate H
Outputs return to the input state within
1 μs of V
DDI
power restoration.
X X Powered Unpowered H Indeterminate
Outputs return to the input state within
1 μs of V
DDO
power restoration.
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