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AT32UC3L032-D3HT 数据手册 - Microchip（微芯）
制造商:
Microchip（微芯）
分类:
微控制器
封装:
UFLGA-48
描述:
32位微控制器 - MCU UC3L-32KB Flash 85C
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P186P294P361P416P457P491P520P596P597P623P624P690Hot
典型应用电路图在P493
原理图在P5P42P105P140P141P152P159P189P193P195P251P280
封装尺寸在P803P804P805
型号编码规则在P807P838P839
封装信息在P803P804P805
功能描述在P11P43P78P106P126P141P153P187P252P281P294P316
应用领域在P1
电气规格在P10P80P100P160P187P190P192P194P197P198P222P251
导航目录
AT32UC3L032-D3HT数据手册
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3
32099I–01/2012
AT32UC3L016/32/64
1. Description
The Atmel
®
AVR
®
AT32UC3L016/32/64 is a complete system-on-chip microcontroller based on
the AVR32 UC RISC processor running at frequencies up to 50MHz. AVR32 UC is a high-per-
formance 32-bit RISC microprocessor core, designed for cost-sensitive embedded applications,
with particular emphasis on low power consumption, high code density, and high performance.
The processor implements a Memory Protection Unit (MPU) and a fast and flexible interrupt con-
troller for supporting modern and real-time operating systems. The Secure Access Unit (SAU) is
used together with the MPU to provide the required security and integrity.
Higher computation capability is achieved using a rich set of DSP instructions.
The AT32UC3L016/32/64 embeds state-of-the-art picoPower technology for ultra-low power
consumption. Combined power control techniques are used to bring active current consumption
down to 165
µA/MHz, and leakage down to 9nA while still retaining a bank of backup registers.
The device allows a wide range of trade-offs between functionality and power consumption, giv-
ing the user the ability to reach the lowest possible power consumption with the feature set
required for the application.
The Peripheral Direct Memory Access (DMA) controller enables data transfers between periph-
erals and memories without processor involvement. The Peripheral DMA controller drastically
reduces processing overhead when transferring continuous and large data streams.
The AT32UC3L016/32/64 incorporates on-chip Flash and SRAM memories for secure and fast
access. The FlashVault technology allows secure libraries to be programmed into the device.
The secure libraries can be executed while the CPU is in Secure State, but not read by non-
secure software in the device. The device can thus be shipped to end customers, who will be
able to program their own code into the device to access the secure libraries, but without risk of
compromising the proprietary secure code.
The External Interrupt Controller (EIC) allows pins to be configured as external interrupts. Each
external interrupt has its own interrupt request and can be individually masked.
The Peripheral Event System allows peripherals to receive, react to, and send peripheral events
without CPU intervention. Asynchronous interrupts allow advanced peripheral operation in low
power sleep modes.
The Power Manager (PM) improves design flexibility and security. The Power Manager supports
SleepWalking functionality, by which a module can be selectively activated based on peripheral
events, even in sleep modes where the module clock is stopped. Power monitoring is supported
by on-chip Power-on Reset (POR), Brown-out Detector (BOD), and Supply Monitor (SM). The
device features several oscillators, such as Digital Frequency Locked Loop (DFLL), Oscillator 0
(OSC0), and system RC oscillator (RCSYS). Either of these oscillators can be used as source
for the system clock. The DFLL is a programmable internal oscillator from 40 to 150MHz. It can
be tuned to a high accuracy if an accurate refernce clock is running, e.g. the 32KHz crystal
oscillator.
The Watchdog Timer (WDT) will reset the device unless it is periodically serviced by the soft-
ware. This allows the device to recover from a condition that has caused the system to be
unstable.
The Asynchronous Timer (AST) combined with the 32KHz crystal oscillator supports powerful
real-time clock capabilities, with a maximum timeout of up to 136 years. The AST can operate in
counter mode or calendar mode.
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