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ATMEGA328P-MUR 数据手册 - Microchip（微芯）
制造商:
Microchip（微芯）
分类:
8位微控制器
封装:
QFN-32
描述:
8位 MCU微控制单元, 低功率高性能, AVR ATmega Family ATmega328 Series Microcontrollers, 20 MHz, 32 KB, 2 KB
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P3P4P77Hot
原理图在P6P9P75P93P95P96P97P112P117P118P120P121
封装尺寸在P627P628P629P630P631P649
型号编码规则在P619P620P621P622P623P624P625P626P649
封装信息在P627P649P650
技术参数、封装参数在P299P313
应用领域在P37P47P59P63P66P68P263P267P281P660
电气规格在P75P253P299P313P649
导航目录
ATMEGA328P-MUR数据手册
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649
ATmega48A/PA/88A/PA/168A/PA/328/P [DATASHEET]
Atmel-8271J-AVR- ATmega-Datasheet_11/2015
41.6 Rev. 8271E – 07/2012
41.7 Rev. 8271D – 05/11
41.8 Rev. 8271C – 08/10
”ATmega88PA Typical Characteristics” on page 392
”ATmega168PA Typical Characteristics” on page 442
”ATmega328P Typical Characteristics” on page 492
3. Removed the Power Save (Psave) maximum numbers for all devices throughout ”Electrical Characteristics – (TA =
-40°C to 85°C)” on page 299.
4. Changed the powerdown maximum numbers from 8.5 and 3µA to 10 and 5µA (ATmega48PA, ATmega88PA,
ATmega168PA and ATmega328P).
5. Changed the table note “Maximum values are characterized values and not test limits in production” to “Max values
are test limits in production throughout ”Electrical Characteristics – (TA = -40°C to 85°C)” on page 299.
1. Updated Figure 1-1 on page 3. Overlined “RESET” in 28 MLF top view and in 32 MLF top view.
2. Added EEAR9 bit to the ”EEARH and EEARL – The EEPROM Address Register” on page 22 and updated the all bit
descriptions accordingly.
3. Added a footnote “EEAR9 and EEAR8 are unused bits in ATmega48A/48PA and must always be written to zero” to
”EEARH and EEARL – The EEPROM Address Register” on page 22.
4. Updated Table 18-8 on page 155, “Waveform Generation Mode Bit Description” . WGM2, WGM1 and WGM0
changed to WGM22, WGM21 and WGM20 respectively.
5. Updated ”TCCR2B – Timer/Counter Control Register B” on page 156. bit 2 (CS22) and bit 3 (WGM22) changed
from R (read only) to R/W (read/write).
6. Updated the definition of fosc on page 172. fosc is the system clock frequency (not XTAL pin frequency)
7. Updated ”SPMCSR – Store Program Memory Control and Status Register” on page 261. Bit 0 renamed SPMEN
and added bit 5 “SIGRD”.
8. Replaced “SELFPRGEN” by “SPMEN” throughout the whole datasheet including in the “code examples”, except in
”Program And Data Memory Lock Bits” on page 280 and in ”Fuse Bits” on page 281.
9. Updated ”Register Summary” on page 612 to include the bits: SIGRD and SPMEN in the SMPCSR register.
10. Updated the Table 30-1 on page 313. Removed the footnote.
11. Updated the footnote of the Table 29-13 on page 306. Removed the footnote “Note 2”.
12. Updated ”Errata” on page 632. Added “Errata” TWI Data setup time can be too short.
1. Added Atmel QTouch Sensing Capability Feature
2. Updated ”Register Description” on page 91 with PINxn as R/W.
3. Added a footnote to the PINxn, page 91.
4. Updated “Ordering Information”,”ATmega328” on page 625. Added “ATmega328-MMH” and “ATmega328-MMHR”.
5. Updated “Ordering Information”,”ATmega328P” on page 626. Added “ATmega328P-MMH” and “ATmega328P-
MMHR”.
6. Added “Ordering Information” for ATmega48PA/88PA/168PA/328P @ 105C
7. Updated ”Errata ATmega328” on page 642 and ”Errata ATmega328P” on page 645
8. Updated the datasheet according to the Atmel new brand style guide.
1. Added 32UFBGA Pinout, Table 1-1 on page 3.
2. Updated the “SRAM Data Memory”, Figure 8-3 on page 19.
3. Updated ”Ordering Information” on page 619 with CCU and CCUR code related to “32CC1” Package drawing.
4. “32CC1” Package drawing added ”Packaging Information” on page 627.
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