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ATMEGA64 数据手册 - ATMEL（爱特美尔）
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引脚图在P2P5P66P91P144Hot
原理图在P3P8P64P91P93P94P95P111P116P117P119P121
封装尺寸在P349P350
型号编码规则在P348P354
封装信息在P349P354
应用领域在P33P49P60P63P277P280P290P291
电气规格在P64P88
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ATMEGA64数据手册
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5
ATmega64(L)
2490G–AVR–03/04
ATmega103 Compatibility
Mode
By programming the M103C Fuse, the ATmega64 will be compatible with the
ATmega103 regards to RAM, I/O pins and Interrupt Vectors as described above. How-
ever, some new features in ATmega64 are not available in this compatibility mode,
these features are listed below:
• One USART instead of two, asynchronous mode only. Only the eight least
significant bits of the Baud Rate Register is available.
• One 16 bits Timer/Counter with two compare registers instead of two 16 bits
Timer/Counters with three compare registers.
• Two-wire serial interface is not supported.
• Port G serves alternate functions only (not a general I/O port).
• Port F serves as digital input only in addition to analog input to the ADC.
• Boot Loader capabilities is not supported.
• It is not possible to adjust the frequency of the internal calibrated RC Oscillator.
• The External Memory Interface can not release any Address pins for general I/O,
neither configure different wait states to different External Memory Address
sections.
• Only EXTRF and PORF exist in the MCUCSR Register.
• No timed sequence is required for Watchdog Timeout change.
• Only low-level external interrupts can be used on four of the eight External Interrupt
sources.
• Port C is output only.
• USART has no FIFO buffer, so Data OverRun comes earlier.
• The user must have set unused I/O bits to 0 in ATmega103 programs.
Pin Descriptions
VCC Digital supply voltage.
GND Ground.
Port A (PA7..PA0) Port A is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each
bit). The Port A output buffers have symmetrical drive characteristics with both high sink
and source capability. As inputs, Port A pins that are externally pulled low will source
current if the pull-up resistors are activated. The Port A pins are tri-stated when a reset
condition becomes active, even if the clock is not running.
Port A also serves the functions of various special features of the ATmega64 as listed
on page 71.
Port B (PB7..PB0) Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each
bit). The Port B output buffers have symmetrical drive characteristics with both high sink
and source capability. As inputs, Port B pins that are externally pulled low will source
current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset
condition becomes active, even if the clock is not running.
Port B also serves the functions of various special features of the ATmega64 as listed
on page 72.
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