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ATTINY13A-SSU 数据手册 - ATMEL（爱特美尔）
制造商:
ATMEL（爱特美尔）
分类:
8位微控制器
封装:
SOIC-8
描述:
ATMEL ATTINY13A-SSU 微控制器, 8位, 低功率高性能, ATtiny, 20 MHz, 1 KB, 60 Byte, 8 引脚, SOIC
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符号图
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引脚图
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页面导航:
引脚图在P2P3P51Hot
原理图在P4P7P49P59P61P62P63P79P82
封装尺寸在P163P164P165P166P167
型号编码规则在P162
封装信息在P163
应用领域在P28
电气规格在P96P162
导航目录
ATTINY13A-SSU数据手册
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63
8126F–AVR–05/12
ATtiny13A
generation. Similarly, do not write the TCNT0 value equal to BOTTOM when the counter is
down-counting.
The setup of the OC0x should be performed before setting the Data Direction Register for the
port pin to output. The easiest way of setting the OC0x value is to use the Force Output Com-
pare (FOC0x) strobe bits in Normal mode. The OC0x Registers keep their values even when
changing between Waveform Generation modes.
Be aware that the COM0x[1:0] bits are not double buffered together with the compare value.
Changing the COM0x[1:0] bits will take effect immediately.
11.6 Compare Match Output Unit
The Compare Output mode (COM0x[1:0]) bits have two functions. The Waveform Generator
uses the COM0x[1:0] bits for defining the Output Compare (OC0x) state at the next Compare
Match. Also, the COM0x[1:0] bits control the OC0x pin output source. Figure 11-4 on page 63
shows a simplified schematic of the logic affected by the COM0x[1:0] bit setting. The I/O Regis-
ters, I/O bits, and I/O pins in the figure are shown in bold. Only the parts of the general I/O Port
Control Registers (DDR and PORT) that are affected by the COM0x[1:0] bits are shown. When
referring to the OC0x state, the reference is for the internal OC0x Register, not the OC0x pin. If
a system reset occur, the OC0x Register is reset to “0”.
Figure 11-4. Compare Match Output Unit, Schematic
The general I/O port function is overridden by the Output Compare (OC0x) from the Waveform
Generator if either of the COM0x[1:0] bits are set. However, the OC0x pin direction (input or out-
put) is still controlled by the Data Direction Register (DDR) for the port pin. The Data Direction
Register bit for the OC0x pin (DDR_OC0x) must be set as output before the OC0x value is visi-
ble on the pin. The port override function is independent of the Waveform Generation mode.
PORT
DDR
DQ
DQ
OCn
Pin
OCnx
DQ
Waveform
Generator
COMnx1
COMnx0
0
1
DATA B U
S
FOCn
clk
I/O
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