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AX5243 数据手册 - ON Semiconductor（安森美）
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AX5243数据手册
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AX5243
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Table 1. PIN FUNCTION DESCRIPTIONS
Symbol Pin(s) Type Description
VDD_ANA 1 P Analog power output, decouple to neighboring GND
GND 2 P Ground, decouple to neighboring VDD_ANA
ANTP 3 A Differential antenna input/output
ANTN 4 A Differential antenna input/output
VDD_ANA 5 P Analog power output, decouple to GND
FILT 6 A Optional synthesizer filter
L2 7 A Optional synthesizer inductor, should be shorted with L1 if not used.
L1 8 A Optional synthesizer inductor, should be shorted with L2 if not used.
SYSCLK 9 I/O Default functionality: Crystal oscillator (or divided) clock output
Can be programmed to be used as a general purpose I/O pin
Selectable internal 65 kW pull−up resistor
SEL 10 I Serial peripheral interface select
CLK 11 I Serial peripheral interface clock
MISO 12 O Serial peripheral interface data output
MOSI 13 I Serial peripheral interface data input
IRQ 14 I/O Default functionality: Transmit and receive interrupt
Can be programmed to be used as a general purpose I/O pin
Selectable internal 65 kW pull−up resistor
TCXO_EN 15 I/O General purpose I/O pin which can be programmed to enable an
external TCXO
Selectable internal 65 kW pull−up resistor
VDD_IO 16 P Power supply 1.8 V – 3.3 V
GPADC1 17 A GPADC input, must be connected to GND if not used
GPADC2 18 A GPADC input, must be connected to GND if not used
CLK16N 19 A Crystal oscillator input/output
CLK16P 20 A Crystal oscillator input/output
GND Center pad P Ground on center pad of QFN, must be connected
A = analog input
I = digital input signal
O = digital output signal
I/O = digital input/output signal
N = not to be connected
P = power or ground
All digital inputs are Schmitt trigger inputs, digital input
and output levels are LVCMOS/LVTTL compatible and 5 V
tolerant.
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