Datasheet 搜索 > Flash芯片 > ON Semiconductor（安森美） > CAT28F001HI-12T 数据手册 > CAT28F001HI-12T 数据手册 1/18 页
器件3D模型￥ 0
CAT28F001HI-12T 数据手册 - ON Semiconductor（安森美）
制造商:
ON Semiconductor（安森美）
分类:
Flash芯片
封装:
TSOP-32
描述:
NOR闪存 (128x8) 1M 120ns
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P2Hot
原理图在P1
型号编码规则在P17
导航目录
CAT28F001HI-12T数据手册
Page:
of 18 Go
若手册格式错乱，请下载阅览PDF原文件
1
Doc. No. MD-1078, Rev. K
© 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
1 Megabit CMOS Boot Block
Flash Memory
FEATURES
■ Fast Read Access Time: 90/120 ns
■ On-Chip Address and Data Latches
■ Blocked Architecture
— One 8 KB Boot Block w/ Lock Out
• Top or Bottom Locations
— Two 4 KB Parameter Blocks
— One 112 KB Main Block
■ Low Power CMOS Operation
■ 12.0V ± 5% Programming and Erase Voltage
■ Automated Program & Erase Algorithms
■ High Speed Programming
■ Commercial, Industrial and Automotive
Temperature Ranges
■ Deep Powerdown Mode
— 0.05 µA I
CC
Typical
— 0.8 µA I
PP
Typical
■ Hardware Data Protection
■ Electronic Signature
■ 100,000 Program/Erase Cycles and 10 Year
Data Retention
■ JEDEC Standard Pinouts:
— 32 pin DIP
— 32 pin PLCC
— 32 pin TSOP
■ Reset/Deep Power Down Mode
■ "Green" Package Options Available
I/O
0
–I/O
7
I/O BUFFERS
CE, OE LOGIC
SENSE
AMP
DATA
LATCH
ERASE VOLTAGE
SWITCH
COMMAND
REGISTER
CE
OE
WE
VOLTAGE VERIFY
SWITCH
ADDRESS LATCH
Y-DECODER
X-DECODER
Y-GATING
8K-BYTE BOOT BLOCK
4K-BYTE PARAMETER BLOCK
4K-BYTE PARAMETER BLOCK
112K-BYTE MAIN BLOCK
A
0
–A
16
WRITE STATE
MACHINE
ADDRESS
COUNTER
STATUS
REGISTER
COMPARATOR
PROGRAM VOLTAGE
SWITCH
RP
BLOCK DIAGRAM
DESCRIPTION
The CAT28F001 is a high speed 128K X 8 bit electrically
erasable and reprogrammable Flash memory ideally
suited for applications requiring in-system or after sale
code updates.
The CAT28F001 has a blocked architecture with one 8
KB Boot Block, two 4 KB Parameter Blocks and one 112
KB Main Block. The Boot Block section can be at the top
or bottom of the memory map and includes a reprogram-
ming write lock out feature to guarantee data integrity. It
is designed to contain secure code which will bring up
the system minimally and download code to other loca-
tions of CAT28F001.
The CAT28F001 is designed with a signature mode
which allows the user to identify the IC manufacturer and
device type. The CAT28F001 is also designed with on-
Chip Address Latches, Data Latches, Programming and
Erase Algorithms.
The CAT28F001 is manufactured using Catalyst’s ad-
vanced CMOS floating gate technology. It is designed
to endure 100,000 program/erase cycles and has a data
retention of 10 years. The device is available in JEDEC
approved 32-pin plastic DIP, PLCC or TSOP packages.
Licensed Intel
second source
CAT28F001
器件 Datasheet 文档搜索
AiEMA 数据库涵盖高达 72,405,303 个元件的数据手册，每天更新 5,000 多个 PDF 文件
