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CD4052BM96G4
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CD4052BM96G4数据手册
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11
10
9
6
A
B
C
INH
123 5 1 2 13
TG
TG
TG
TG
TG
TG
4
COMMON
OUT/IN
axaybxbycxcy
8
7
V V
SS EE
16
V
IN/OUT
DD
15
14
BINARY TO
1 OF 2
DECODERS
WITH
INHIBIT
LOGIC
LEVEL
CONVERSION
V
DD
COMMON
OUT/IN
COMMON
OUT/IN
ax OR ay
bx OR by
cx OR cy
1211 15 14
0123
3210
X CHANNELS IN/OUT
Y CHANNELS IN/OUT
BINARY
TO
1 OF 4
DECODER
WITH
INHIBIT
13
3
COMMON Y
OUT/IN
COMMON X
OUT/IN
78
16
6
9
10
A
B
INH
V V
V
SS EE
DD
TG
TG
TG
TG
TG
TG
TG
TG
4251
LOGIC
LEVEL
CONVERSION
CD4051B
,
CD4052B
,
CD4053B
www.ti.com
SCHS047H AUGUST 1998REVISED APRIL 2015
Functional Block Diagrams (continued)
All inputs are protected by standard CMOS protection network.
Figure 26. Functional Block Diagram, CD4052B
All inputs are protected by standard CMOS protection network.
Figure 27. Functional Block Diagram, CD4053B
Copyright © 1998–2015, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Links: CD4051B CD4052B CD4053B

CD4052BM96G4 数据手册

TI(德州仪器)
38 页 / 1.37 MByte

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