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CY7C63723-PC 数据手册 - Cypress Semiconductor(赛普拉斯)
制造商:
Cypress Semiconductor(赛普拉斯)
分类:
微控制器
封装:
DIP-18
描述:
的enCoRe USB的组合低速USB和PS / 2外围控制器 enCoRe USB Combination Low-Speed USB & PS/2 Peripheral Controller
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P3P23Hot
原理图在P2P14P21P24P25P31
型号编码规则在P45
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CY7C63723-PC数据手册
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enCoRe™ USB Combination Low-Speed
USB and PS/2 Peripheral Controller
CY7C63722
CY7C63723
CY7C63743
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Document #: 38-08022 Rev. *B Revised September 27, 2004
1.0 Features
• enCoRe™ USB - enhanced Component Reduction
— Internal oscillator eliminates the need for an external
crystal or resonator
—Interface can auto-configure to operate as PS/2 or
USB without the need for external components to
switch between modes (no General Purpose I/O
[GPIO] pins needed to manage dual mode capability)
—Internal 3.3V regulator for USB pull-up resistor
—Configurable GPIO for real-world interface without
external components
• Flexible, cost-effective solution for applications that
combine PS/2 and low-speed USB, such as mice, game-
pads, joysticks, and many others.
• USB Specification Compliance
—Conforms to USB Specification, Version 2.0
—Conforms to USB HID Specification, Version 1.1
—Supports one low-speed USB device address and
three data endpoints
—Integrated USB transceiver
—3.3V regulated output for USB pull-up resistor
• 8-bit RISC microcontroller
—Harvard architecture
—6-MHz external ceramic resonator or internal clock
mode
—12-MHz internal CPU clock
—Internal memory
—256 bytes of RAM
—8 Kbytes of EPROM
—Interface can auto-configure to operate as PS/2 or
USB
— No external components for switching between PS/2
and USB modes
—No GPIO pins needed to manage dual mode
capability
• I/O ports
—Up to 16 versatile GPIO pins, individually
configurable
—High current drive on any GPIO pin: 50 mA/pin
current sink
—Each GPIO pin supports high-impedance inputs,
internal pull-ups, open drain outputs or traditional
CMOS outputs
—Maskable interrupts on all I/O pins
• SPI serial communication block
—Master or slave operation
—2 Mbit/s transfers
• Four 8-bit Input Capture registers
—Two registers each for two input pins
—Capture timer setting with five prescaler settings
—Separate registers for rising and falling edge capture
—Simplifies interface to RF inputs for wireless
applications
• Internal low-power wake-up timer during suspend
mode
—Periodic wake-up with no external components
• Optional 6-MHz internal oscillator mode
—Allows fast start-up from suspend mode
• Watchdog Reset (WDR)
• Low-voltage Reset at 3.75V
• Internal brown-out reset for suspend mode
• Improved output drivers to reduce EMI
• Operating voltage from 4.0V to 5.5VDC
• Operating temperature from 0°C to 70°C
• CY7C63723 available in 18-pin SOIC, 18-pin PDIP
• CY7C63743 available in 24-pin SOIC, 24-pin PDIP, 24-pin
QSOP
• CY7C63722 available in DIE form
• Industry standard programmer support
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