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CYUSB3014-BZXIT 数据手册 - Cypress Semiconductor（赛普拉斯）
制造商:
Cypress Semiconductor（赛普拉斯）
分类:
微控制器
封装:
BGA-121
描述:
USB 接口集成电路 32-bit 512KB RAM FX3 SuprSped USB Con
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CYUSB3014-BZXIT数据手册
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若手册格式错乱，请下载阅览PDF原文件
CYUSB301X/CYUSB201X
Document Number: 001-52136 Rev. *S Page 5 of 53
Functional Overview
Cypress’s EZ-USB FX3 is a SuperSpeed peripheral controller,
providing integrated and flexible features.
FX3 has a fully configurable, parallel, general programmable
interface called GPIF II, which can connect to any processor,
ASIC, or FPGA. GPIF II is an enhanced version of the GPIF in
FX2LP, Cypress’s flagship USB 2.0 product. It provides easy and
glueless connectivity to popular interfaces, such as
asynchronous SRAM, asynchronous and synchronous address
data multiplexed interfaces, and parallel ATA.
FX3 has integrated the USB 3.1 Gen 1 and USB 2.0 physical
layers (PHYs) along with a 32-bit ARM926EJ-S microprocessor
for powerful data processing and for building custom
applications. It implements an architecture that enables
375-MBps data transfer from GPIF II to the USB interface.
An integrated USB 2.0 OTG controller enables applications in
which FX3 may serve dual roles; for example, EZ-USB FX3 may
function as an OTG Host to MSC as well as HID-class devices.
FX3 contains 512 KB or 256 KB of on-chip SRAM (see Ordering
Information on page 45) for code and data. EZ-USB FX3 also
provides interfaces to connect to serial peripherals such as
UART, SPI, I
2
C, and I
2
S.
FX3 comes with application development tools. The software
development kit comes with firmware and host application
examples for accelerating time to market.
FX3 complies with the USB 3.1, Gen 1.0 specification and is also
backward compatible with USB 2.0. It also complies with the
Battery Charging Specification v1.1 and USB 2.0 OTG
Specification v2.0.
Application Examples
In a typical application (see Figure 1), the FX3 functions as the
main processor running the application software that connects
external hardware to the SuperSpeed USB connection.
Additionally, FX3 can function as a coprocessor connecting via
the GPIF II interface to an application processor (see Figure 2)
and operates as a subsystem providing SuperSpeed USB
connectivity to the application processor.
Figure 1. EZ-USB FX3 as Main Processor
Ez-USB FX3USB GPIF II
Clock
I
2
C
USB
Host
External Slave
Device
(e.g. Image
Sensor)
Crystal*
EEPROM
* A clock input may be provided on the
CLKIN pin instead of a crystal input
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