Datasheet 搜索 > FPGA芯片 > Altera（阿尔特拉） > EP2C8T144I8N 数据手册 > EP2C8T144I8N 数据手册 5/168 页
器件3D模型￥ 99.451
EP2C8T144I8N 数据手册 - Altera（阿尔特拉）
制造商:
Altera（阿尔特拉）
分类:
FPGA芯片
封装:
TQFP-144
描述:
ALTERA EP2C8T144I8N 芯片, FPGA, CYCLONE II, 8K单元, TQFP144
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
典型应用电路图在P14P16P18
原理图在P14P86
型号编码规则在P167
功能描述在P13
技术参数、封装参数在P63P78P83P84P86P91P93P95P97P99P101P102
应用领域在P105P106P107P108P167
导航目录
EP2C8T144I8N数据手册
Page:
of 168 Go
若手册格式错乱，请下载阅览PDF原文件
Altera Corporation 1–3
February 2008 Cyclone II Device Handbook, Volume 1
Introduction
● 133-MHz PCI-X 1.0 specification compatibility
● High-speed external memory support, including DDR, DDR2,
and SDR SDRAM, and QDRII SRAM supported by drop in
Altera IP MegaCore functions for ease of use
● Three dedicated registers per I/O element (IOE): one input
register, one output register, and one output-enable register
● Programmable bus-hold feature
● Programmable output drive strength feature
● Programmable delays from the pin to the IOE or logic array
● I/O bank grouping for unique VCCIO and/or VREF bank
settings
● MultiVolt
™
I/O standard support for 1.5-, 1.8-, 2.5-, and
3.3-interfaces
● Hot-socketing operation support
● Tri-state with weak pull-up on I/O pins before and during
configuration
● Programmable open-drain outputs
● Series on-chip termination support
■ Flexible clock management circuitry
● Hierarchical clock network for up to 402.5-MHz performance
● Up to four PLLs per device provide clock multiplication and
division, phase shifting, programmable duty cycle, and external
clock outputs, allowing system-level clock management and
skew control
● Up to 16 global clock lines in the global clock network that drive
throughout the entire device
■ Device configuration
● Fast serial configuration allows configuration times less than
100 ms
● Decompression feature allows for smaller programming file
storage and faster configuration times
● Supports multiple configuration modes: active serial, passive
serial, and JTAG-based configuration
● Supports configuration through low-cost serial configuration
devices
● Device configuration supports multiple voltages (either 3.3, 2.5,
or 1.8 V)
■ Intellectual property
● Altera megafunction and Altera MegaCore function support,
and Altera Megafunctions Partners Program (AMPP
SM
)
megafunction support, for a wide range of embedded
processors, on-chip and off-chip interfaces, peripheral
functions, DSP functions, and communications functions and
Downloaded from Elcodis.com electronic components distributor
器件 Datasheet 文档搜索
AiEMA 数据库涵盖高达 72,405,303 个元件的数据手册，每天更新 5,000 多个 PDF 文件
