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EP4CE10U14I7N 数据手册 - Altera（阿尔特拉）
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Altera（阿尔特拉）
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FPGA芯片
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BGA-256
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可编程逻辑器件(CPLD/FPGA) EP4CE10U14I7N BGA-256
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EP4CE10U14I7N数据手册
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Chapter 1: Cyclone IV Device Datasheet 1–3
Operating Conditions
March 2016 Altera Corporation Cyclone IV Device Handbook,
Volume 3
1 A DC signal is equivalent to 100% duty cycle. For example, a signal that overshoots to
4.3 V can only be at 4.3 V for 65% over the lifetime of the device; for a device lifetime
of 10 years, this amounts to 65/10ths of a year.
Figure 1–1 shows the methodology to determine the overshoot duration. The
overshoot voltage is shown in red and is present on the input pin of the Cyclone IV
device at over 4.3 V but below 4.4 V. From Table 1–2, for an overshoot of 4.3 V, the
percentage of high time for the overshoot can be as high as 65% over a 10-year period.
Percentage of high time is calculated as ([delta T]/T) × 100. This 10-year period
assumes that the device is always turned on with 100% I/O toggle rate and 50% duty
cycle signal. For lower I/O toggle rates and situations in which the device is in an idle
state, lifetimes are increased.
Table 1–2. Maximum Allowed Overshoot During Transitions over a 10-Year Time Frame for
Cyclone IV Devices
Symbol Parameter Condition (V) Overshoot Duration as % of High Time Unit
V
i
AC Input
Voltage
V
I
= 4.20 100 %
V
I
= 4.25 98 %
V
I
= 4.30 65 %
V
I
= 4.35 43 %
V
I
= 4.40 29 %
V
I
= 4.45 20 %
V
I
= 4.50 13 %
V
I
= 4.55 9 %
V
I
= 4.60 6 %
Figure 1–1. Cyclone IV Devices Overshoot Duration
3.3 V
4.3 V
4.4 V
T
DT
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