器件3D模型

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FT232RQ-TRAY 数据手册 - FTDI Chip（飞特帝亚）

制造商:

FTDI Chip（飞特帝亚）

分类:

接口芯片

封装:

QFN-32

Pictures:

3D模型

符号图

焊盘图

引脚图

产品图

页面导航:

引脚图在P7P10P13Hot

典型应用电路图在P2P28

原理图在P4P7

封装尺寸在P7P10P36P37

焊盘布局在P38P39

焊接温度在P39P40

功能描述在P14P15

技术参数、封装参数在P17

应用领域在P2P33

型号编号列表在P2

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引脚图在P7 P10 P13
典型应用电路图在P2 P28
原理图在P4 P7
封装尺寸在P7 P10 P36 P37
焊盘布局在P38 P39
焊接温度在P39 P40
功能描述在P14 P15
技术参数、封装参数在P17
应用领域在P2 P33
型号编号列表在P2

FT232RQ-TRAY数据手册

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Document No.: FT_000053

FT232R USB UART IC Datasheet Version 2.11

Clearance No.: FTDI# 38

iii) One of the CBUS Pins should be configured as PWREN# in the internal FT232R EEPROM, and used

to switch the power supply to the external circuitry. This should be pulled high through a 10 kΩ

resistor.

iv) For USB high-power bus powered applications (one that consumes greater than 100mA, and up

to 500mA of current from the USB bus), the power consumption of the application must be set in

the Max Power field in the internal FT232R EEPROM. A high-power bus powered application uses

the descriptor in the internal FT232R EEPROM to inform the system of its power requirements.

v) PWREN# gets its VCC from VCCIO. For designs using 3V3 logic, ensure VCCIO is not powered

down using the external logic. In this case use the +3V3OUT.

6.4 USB Bus Powered with Selectable External Logic Supply

FT232R

100nF

3V3OUT

VCCIO

RESET#

10nF

TXD

RXD

RTS#

CTS#

DTR#

DSR#

DCD#

RI#

CBUS0

CBUS3

CBUS2

CBUS1

USBDP

USBDM

VCC

OSCI

OSCO

CBUS4

Ferrite

Bead

SHIELD

GND

3.3V or 5V

Supply to

External Logic

100nF

Vcc

4.7uF

GND

Jumper

SLEEP#

PWREN#

Vcc

VCCIO

10K

VCCIO

Figure 6.4 USB Bus Powered with +3.3V or +5V External Logic Power Supply

Figure 6.4 illustrates a USB bus power application with selectable external logic supply. The external logic

can be selected between +3.3V and +5V using the jumper switch. This jumper is used to allow the

FT232R to be interfaced with a +3.3V or +5V logic devices. The VCCIO pin is either supplied with +5V

from the USB bus (jumper pins1 and 2 connected), or from the +3.3V output from the FT232R 3V3OUT

pin (jumper pins 2 and 3 connected). The supply to VCCIO is also used to supply external logic.

With bus powered applications, the following should be noted:

i) To comply with the 2.5mA current supply limit during USB suspend mode, PWREN# or

SLEEP# signals should be used to power down external logic in this mode. If this is not

possible, use the configuration shown in Section 6.3.

ii) The maximum current sourced from the USB bus during normal operation should not exceed

100mA, otherwise a bus powered design with power switching (Section 6.3) should be used.

Another possible configuration could use a discrete low dropout (LDO) regulator which is supplied by the

5V on the USB bus to supply between +1.8V and +2.8V to the VCCIO pin and to the external logic. In

this case VCC would be supplied with the +5V from the USB bus and the VCCIO would be supplied from

the output of the LDO regulator. This results in the FT232R I/O pins driving out at between +1.8V and

+2.8V logic levels.

For a USB bus powered application, it is important to consider the following when selecting the regulator:

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