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I3G4250DTR 数据手册 - ST Microelectronics（意法半导体）
制造商:
ST Microelectronics（意法半导体）
分类:
陀螺仪
封装:
TFLGA-16
描述:
STMICROELECTRONICS I3G4250DTR MEMS Gyroscope, I2C/SPI, Digital, X, Y, Z, ± 245°/s, ± 500°/s, ± 2000°/s, 2.4 V, 3.6 V, LGA 新
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I3G4250DTR数据手册
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Main digital blocks I3G4250D
16/43 DocID027628 Rev 2
3 Main digital blocks
3.1 Block diagram
Figure 6. Block diagram
3.2 FIFO
The I3G4250D embeds a 32-slot, 16-bit data FIFO for each of the three output channels:
yaw, pitch, and roll. This allows consistent power saving for the system, as the host
processor does not need to continuously poll data from the sensor. Instead, it can wake up
only when needed and burst the significant data out from the FIFO. This buffer can work in
three different modes. Each mode is selected by the FIFO_MODE bits in FIFO_CTRL_REG
(2Eh). Programmable watermark level, FIFO_empty or FIFO_Full events can be enabled to
generate dedicated interrupts on the DRDY/INT2 pin (configured through CTRL_REG3
(22h)), and event detection information is available in FIFO_SRC_REG (2Fh). The
watermark level can be configured using the WTM4:0 bits in FIFO_CTRL_REG (2Eh).
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