Datasheet 搜索 > 电池管理芯片 > Intersil（英特矽尔） > ISL6255AHRZ 数据手册 > ISL6255AHRZ 数据手册 4/22 页
器件3D模型￥ 20.889
ISL6255AHRZ 数据手册 - Intersil（英特矽尔）
制造商:
Intersil（英特矽尔）
分类:
电池管理芯片
封装:
QFN-28
描述:
高度集成的电池充电器具有自动电源选择器，用于笔记本电脑 Highly Integrated Battery Charger with Automatic Power Source Selector for Notebook Computers
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3D模型
符号图
焊盘图
引脚图
产品图
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引脚图在P8Hot
典型应用电路图在P11P12
原理图在P10
型号编码规则在P1
标记信息在P1
封装信息在P1
技术参数、封装参数在P4P5P6
应用领域在P1
电气规格在P4P5P6
型号编号列表在P17P18
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ISL6255AHRZ数据手册
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4
FN9203.2
May 23, 2006
DCSET Input Bias Current Hysteresis 2.2 3.4 4.4 µA
DCSET Input Bias Current DCSET ≥ 1.26V 2.2 3.4 4.4 µA
DCSET Input Bias Current DCSET < 1.26V -1 0 1 µA
OSCILLATOR
Frequency 245 300 355 kHz
PWM Ramp Voltage (peak-peak) CSIP = 18V 1.6 V
CSIP = 11V 1 V
SYNCHRONOUS BUCK REGULATOR
Maximum Duty Cycle 97 99 99.6 %
UGATE Pull-Up Resistance BOOT-PHASE = 5V, 500mA source current 1.8 3.0 Ω
UGATE Source Current BOOT-PHASE = 5V, BOOT-UGATE = 2.5V 1.0 A
UGATE Pull-down Resistance BOOT-PHASE = 5V, 500mA sink current 1.0 1.8 Ω
UGATE Sink Current BOOT-PHASE = 5V, UGATE-PHASE = 2.5V 1.8 A
LGATE Pull-Up Resistance VDDP-PGND = 5V, 500mA source current 1.8 3.0 Ω
LGATE Source Current VDDP-PGND = 5V, VDDP-LGATE = 2.5V 1.0 A
LGATE Pull-Down Resistance VDDP-PGND = 5V, 500mA sink current 1.0 1.8 Ω
LGATE Sink Current VDDP-PGND = 5V, LGATE = 2.5V 1.8 A
CHARGING CURRENT SENSING AMPLIFIER
Input Common-Mode Range 0 18 V
Input Offset Voltage Guaranteed by design -2.5 0 2.5 mV
Input Bias Current at CSOP 0 < CSOP < 18V 0.25 2 µA
Input Bias Current at CSON 0 < CSON < 18V 75 100 µA
CHLIM Input Voltage Range 0 3.6 V
CSOP to CSON Full-Scale Current Sense
Voltage
ISL6255: CHLIM = 3.3V 157 165 173 mV
ISL6255A: CHLIM = 3.3V 160 165 170 mV
ISL6255: CHLIM = 2.0V 95 100 105 mV
ISL6255A: CHLIM = 2.0V 97 100 103 mV
ISL6255: CHLIM = 0.2V 5.0 10 15.0 mV
ISL6255A: CHLIM = 0.2V 7.5 10 12.5 mV
CHLIM Input Bias Current CHLIM = GND or 3.3V, DCIN = 0V -1 1 µA
CHLIM Power-Down Mode Threshold
Voltage
CHLIM rising 80 88 95 mV
CHLIM Power-Down Mode Hysteresis
Voltage
15 25 40 mV
ADAPTER CURRENT SENSING AMPLIFIER
Input Common-Mode Range 7 25 V
Input Offset Voltage Guaranteed by design -2 2 mV
Input Bias Current at CSIP and CSIN
Combined
CSIP = CSIN = 25V 100 130 µA
Input Bias Current at CSIN 0 < CSIN < DCIN, Guaranteed by design 0.10 1 µA
Electrical Specifications DCIN = CSIP = CSIN = 18V, CSOP = CSON = 12V, ACSET = DCSET = 1.5V, ACLIM = VREF,
VADJ=Floating, EN=VDD=5V, BOOT-PHASE=5.0V, GND=PGND=0V, C
VDD
=1µF, I
VDD
=0mA,
T
A
= -10°C to +100°C, T
J
≤ 125°C, unless otherwise noted. (Continued)
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
ISL6255, ISL6255A
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