Datasheet 搜索 > 接口芯片 > Microchip（微芯） > KSZ9031MNXCC 数据手册 > KSZ9031MNXCC 数据手册 1/73 页
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KSZ9031MNXCC 数据手册 - Microchip（微芯）
制造商:
Microchip（微芯）
分类:
接口芯片
封装:
QFN-64
描述:
以太网控制器, 1 Gbps, IEEE 802.3, 1.14 V, 1.38 V, QFN, 64 引脚
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KSZ9031MNXCC数据手册
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2016 Microchip Technology Inc. DS00002096C-page 1
Target Applications
• Laser/Network Printer
• Network Attached Storage (NAS)
•Network Server
• Broadband Gateway
• Gigabit SOHO/SMB Router
•IPTV
• IP Set-Top Box
• Game Console
• IP Camera
• Triple-Play (Data, Voice, Video) Media Center
• Media Converter
Features
• Single-Chip 10/100/1000 Mbps Ethernet Trans-
ceiver Suitable for IEEE 802.3 Applications
• GMII/MII Standard Interface with 3.3V/2.5V/1.8V
Tolerant I/Os
• Auto-Negotiation to Automatically Select the
Highest Link-Up Speed (10/100/1000 Mbps) and
Duplex (Half/Full)
• On-Chip Termination Resistors for the Differential
Pairs
• On-Chip LDO Controller to Support Single 3.3V
Supply Operation
• Jumbo Frame Support Up to 16 KB
• 125 MHz Reference Clock Output
• Energy-Detect Power-Down Mode for Reduced
Power Consumption When the Cable is Not
Attached
• Wake-On-LAN (WOL) Support with Robust Cus-
tom-Packet Detection
• Programmable LED Outputs for Link, Activity, and
Speed
• Baseline Wander Correction
• LinkMD TDR-based Cable Diagnostic to Identify
Faulty Copper Cabling
• Parametric NAND Tree Support to Detect Faults
Between Chip I/Os and Board
• Loopback Modes for Diagnostics
• Automatic MDI/MDI-X Crossover to Detect and
Correct Pair Swap at All Speeds of Operation
• Automatic Detection and Correction of Pair
Swaps, Pair Skew, and Pair Polarity
• MDC/MDIO Management Interface for PHY Reg-
ister Configuration
• Interrupt Pin Option
• Power-Down and Power-Saving Modes
• Operating Voltages
- Core (DVDDL, AVDDL, AVDDL_PLL): 1.2V
(External FET or Regulator)
- VDD I/O (DVDDH): 3.3V, 2.5V, or 1.8V
- Transceiver (AVDDH): 3.3V or 2.5V
(Commercial Temp.)
• 64-pin QFN (8 mm × 8 mm) Package
KSZ9031MNX
Gigabit Ethernet Transceiver with GMII/MII
Support
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