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LM3S6965-IQC50-A2T
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10 Watchdog Timer
A watchdog timer can generate nonmaskable interrupts (NMIs) or a reset when a time-out value is
reached. The watchdog timer is used to regain control when a system has failed due to a software
error or due to the failure of an external device to respond in the expected way.
The Stellaris
®
Watchdog Timer module has the following features:
32-bit down counter with a programmable load register
Separate watchdog clock with an enable
Programmable interrupt generation logic with interrupt masking
Lock register protection from runaway software
Reset generation logic with an enable/disable
User-enabled stalling when the controller asserts the CPU Halt flag during debug
The Watchdog Timer can be configured to generate an interrupt to the controller on its first time-out,
and to generate a reset signal on its second time-out. Once the Watchdog Timer has been configured,
the lock register can be written to prevent the timer configuration from being inadvertently altered.
371July 15, 2014
Texas Instruments-Production Data
Stellaris
®
LM3S6965 Microcontroller

LM3S6965-IQC50-A2T 数据手册

TI(德州仪器)
761 页 / 4.64 MByte
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761 页 / 5.41 MByte
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11 页 / 0.32 MByte

LM3S6965IQC50A2 数据手册

TI(德州仪器)
TEXAS INSTRUMENTS  LM3S6965-IQC50-A2  微控制器, 32位, ARM 皮质-M3, 50 MHz, 256 KB, 64 KB, 100 引脚, LQFP
TI(德州仪器)
的Stellaris LM3S6965微控制器 Stellaris LM3S6965 Microcontroller
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