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LM5069MM-1/NOPB
器件3D模型
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LM5069MM-1/NOPB数据手册
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0
PGD SINK CURRENT (mA)
PGD VOLTAGE (V)
0 5 10 15 20
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0
5 10 15 20 70 80
VIN VOLTAGE (V)
9
10
11
12
13
14
15
16
17
18
GATE PIN CURRENT (PA)
Enabled, UVLO = VIN
Normal Operation
POR
EN
0 20 40 60 80
VIN VOLTAGE (V)
-20
0
20
40
60
80
100
OUT PIN CURRENT (PA)
Load at OUT Pin = 600:
Current flow is out of the pin
Enabled, UVLO = VIN
Disabled, UVLO = 0V
0
5 10 15 20 70 80
VIN VOLTAGE (V)
GATE-OUT VOLTAGE
0
2
4
6
8
10
12
14
Enabled, UVLO = VIN
Normal Operation
POR
EN
Enabled, UVLO = VIN
Disabled, UVLO = 0V
2.0
1.5
1.0
0.5
0
0 20 60 8040
VIN PIN INPUT CURRENT (mA)
VIN VOLTAGE (V)
100
75
50
25
0
0 20 40 60 80
SENSE PIN VOLTAGE (V)
SENSE PIN INPUT CURRENT (PA)
Enabled, UVLO = VIN
Disabled, UVLO = 0V
LM5069
www.ti.com
SNVS452D SEPTEMBER 2006REVISED MAY 2013
TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise specified the following conditions apply: T
J
= 25°C, V
IN
= 48V
VIN Pin Input Current
vs.
VIN SENSE Pin Input Current
Figure 3. Figure 4.
GATE Pin Voltage
vs.
OUT Pin Current V
IN
Figure 5. Figure 6.
GATE Pin Source Current PGD Pin Low Voltage
vs. vs.
V
IN
Sink Current
Figure 7. Figure 8.
Copyright © 2006–2013, Texas Instruments Incorporated Submit Documentation Feedback 5
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