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LPC11U68JBD48K 数据手册 - NXP（恩智浦）
制造商:
NXP（恩智浦）
封装:
-
描述:
单片机(MCU/MPU/SOC) LPC11U68JBD48K LQFP-48(7x7)
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P7P9P10P11P12P13P14P15P16P17P18P30Hot
原理图在P6
封装尺寸在P86P87P88
型号编码规则在P4
标记信息在P5
焊接温度在P89P90P91
功能描述在P1P19
技术参数、封装参数在P94
应用领域在P3P56P94
导航目录
LPC11U68JBD48K数据手册
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LPC11U6x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 1.3 — 7 September 2016 2 of 97
NXP Semiconductors
LPC11U6x
32-bit ARM Cortex-M0+ microcontroller
Power profiles.
Flash In-Application Programming (IAP) and In-System Programming (ISP).
32-bit integer division routines.
Digital peripherals:
Simple DMA engine with 16 channels and programmable input triggers.
High-speed GPIO interface connected to the ARM Cortex-M0+ IO bus with up to 80
General-Purpose I/O (GPIO) pins with configurable pull-up/pull-down resistors,
programmable open-drain mode, input inverter, and programmable glitch filter and
digital filter.
Pin interrupt and pattern match engine using eight selectable GPIO pins.
Two GPIO group interrupt generators.
CRC engine.
Configurable PWM/timer subsystem (two 16-bit and two 32-bit standard
counter/timers, two State-Configurable Timers (SCTimer/PWM)) that provides:
Up to four 32-bit and two 16-bit counter/timers or two 32-bit and six 16-bit
counter/timers.
Up to 21 match outputs and 16 capture inputs.
Up to 19 PWM outputs with 6 independent time bases.
Windowed WatchDog timer (WWDT).
Real-time Clock (RTC) in the always-on power domain with separate battery supply
pin and 32 kHz oscillator.
Analog peripherals:
One 12-bit ADC with up to 12 input channels with multiple internal and external
trigger inputs and with sample rates of up to 2 Msamples/s. The ADC supports two
independent conversion sequences.
Temperature sensor.
Serial interfaces:
Up to five USART interfaces, all with DMA, synchronous mode, and RS-485 mode
support. Four USARTs use a shared fractional baud generator.
Two SSP controllers with DMA support.
Two I
2
C-bus interfaces. One I
2
C-bus interface with specialized open-drain pins
supports I2C Fast-mode plus.
USB 2.0 full-speed device controller with on-chip PHY. XTAL-less low-speed mode
supported.
Clock generation:
12 MHz internal RC oscillator trimmed to 1 % accuracy for 25 C T
amb
+85 C
that can optionally be used as a system clock.
On-chip 32 kHz oscillator for RTC.
Crystal oscillator with an operating range of 1 MHz to 25 MHz. Oscillator pins are
shared with the GPIO pins.
Programmable watchdog oscillator with a frequency range of 9.4 kHz to 2.3 MHz.
PLL allows CPU operation up to the maximum CPU rate without the need for a
high-frequency crystal.
A second, dedicated PLL is provided for USB.
Clock output function with divider that can reflect the crystal oscillator, the main
clock, the IRC, or the watchdog oscillator.
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