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LT3467/LT3467A
9
3467afe
APPLICATIONS INFORMATION
V
OUT
200mV/DIV
AC COUPLED
I
L1
5A/DIV
AC COUPLED
LOAD CURRENT
100mA/DIV
AC COUPLED
20μs/DIV
3467 F03
Figure 3. Transient Response of Figure 8’s Step-Up
Converter without Phase Lead Capacitor
V
OUT
200mV/DIV
AC COUPLED
I
L1
5A/DIV
AC COUPLED
LOAD CURRENT
100mA/DIV
AC COUPLED
20μs/DIV
3467 F04
Figure 4. Transient Response of Figure 8’s Step-Up
Converter with a 22pF Phase Lead Capacitor
Setting Output Voltage
To set the output voltage, select the values of R1 and R2
(see Figure 2) according to the following equation.
R1=R2
V
OUT
1.255V
–1
A good value for R2 is 13.3k which sets the current in the
resistor divider chain to 1.255V/13.3k = 94μA.
Layout Hints
The high speed operation of the LT3467/LT3467A demands
careful attention to board layout. You will not get adver-
tised performance with careless layout. Figure 5a shows
the recommended component placement for the ThinSOT
package. Figure 5b shows the recommended component
placement for the DFN package. Note the vias under the
Exposed Pad. These should connect to a local ground
plane for better thermal performance.
R2
R1
GND
C2
C3
L1
D1 C1
V
OUT
V
OUT
V
IN
SHDN
3467 F05a
FB
C
SS
SS
1
2
3
6
5
4
Figure 5a. Suggested Layout—ThinSOT
R2
R1
GND
C2
C1
L1
D1
V
OUT
V
OUT
3467 F05b
C3
FB
C
SS
V
IN
1
2
3
4
8
7
6
5
SHDN
Figure 5b. Suggested Layout—DFN

LT3467ES6#TR 数据手册

Linear Technology(凌力尔特)
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