Datasheet 搜索 > RF模块、IC及配件 > ON Semiconductor（安森美） > MC1496BDG 数据手册 > MC1496BDG 数据手册 5/14 页
器件3D模型￥ 0.239
MC1496BDG 数据手册 - ON Semiconductor（安森美）
制造商:
ON Semiconductor（安森美）
分类:
RF模块、IC及配件
封装:
SOIC-14
描述:
MC1496 平衡调制器/解调器**MC1496** 平衡调制器/解调器的输出电压是输入电压（信号）和切换功能（载体）的产品。载体抑制：-65dB @ 0.5MHz，-50dB @ 10MHz 可调增益和信号处理 平衡输入和输出 共模抑制：-85dB 典型 工作温度范围：0 至 +70°C (**MC1496**)，-40 to +125°C (**MC1496B**) 应用：抑制载体和振幅调制，同步检测，FM 检测，相位检测 **RS 产品代码** 463-640 MC1496DG 787-8715 MC1496BDG 787-8712 MC1496DR2G 787-8718 MC1496BDR2G ### Single-Chip Components, ON Semiconductor
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3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P1Hot
典型应用电路图在P1P10
原理图在P8
封装尺寸在P13
焊盘布局在P13
型号编码规则在P1P12P14
标记信息在P1P12
封装信息在P12
技术参数、封装参数在P12
应用领域在P9P10
电气规格在P3
导航目录
MC1496BDG数据手册
Page:
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若手册格式错乱，请下载阅览PDF原文件
MC1496, MC1496B
http://onsemi.com
5
Bias currents flowing into Pins 1, 4, 8 and 10 are transistor
base currents and can normally be neglected if external bias
dividers are designed to carry 1.0 mA or more.
Transadmittance Bandwidth
Carrier transadmittance bandwidth is the 3.0 dB bandwidth
of the device forward transadmittance as defined by:
21C
+
i
o
(each sideband)
v
s
(signal)
⎥
V
o
+ 0
Signal transadmittance bandwidth is the 3.0 dB bandwidth
of the device forward transadmittance as defined by:
21S
+
i
o
(signal)
v
s
(signal)
⎥
V
c
+ 0.5 Vdc, V
o
+ 0
Coupling and Bypass Capacitors
Capacitors C1 and C2 (Figure 5) should be selected for a
reactance of less than 5.0 at the carrier frequency.
Output Signal
The output signal is taken from Pins 6 and 12 either
balanced or single−ended. Figure 11 shows the output levels
of each of the two output sidebands resulting from variations
in both the carrier and modulating signal inputs with a
single−ended output connection.
Negative Supply
V
EE
should be dc only. The insertion of an RF choke in
series with V
EE
can enhance the stability of the internal
current sources.
Signal Port Stability
Under certain values of driving source impedance,
oscillation may occur. In this event, an RC suppression
network should be connected directly to each input using
short leads. This will reduce the Q of the source−tuned
circuits that cause the oscillation.
Signal Input
(Pins 1 and 4)
510
10 pF
An alternate method for low−frequency applications is to
insert a 1.0 k resistor in series with the input (Pins 1, 4). In
this case input current drift may cause serious degradation
of carrier suppression.
NOTE: Shielding of input and output leads may be needed
to properly perform these tests.
Figure 5. Carrier Rejection and Suppression
Figure 6. Input−Output Impedance
Figure 7. Bias and Offset Currents
Figure 8. Transconductance Bandwidth
0.01
F
2.0 k
−8.0 Vdc
I6
I9
1.0 k
I7
I8
6.8 k
Z
out
+V
o
+
+V
o
I9
3
R
L
3.9 k
V
CC
12 Vdc
8
C1
0.1 F
MC1496
1.0 k
2
R
e
1.0 k
C
2
0.1 F
51
10 k
Modulating
Signal Input
Carrier
Input
V
C
Carrier Null
515110 k
50 k
R1
V
S
−V
o
R
L
3.9 k
I6
I4
6
14 5
12
−
2
R
e
= 1.0 k
3
Z
in
0.5 V
8
10
I1
4
1
−V
o
10
1
6
4
14 5
12
6.8 k
V
−
I10
I5
−8.0 Vdc
V
EE
1.0 k
MC1496
MC1496
MC1496
6
14 5
12
I10
6.8 k
−8.0 Vdc
V
EE
V
CC
12 Vdc
2
R
e
= 1.0 k
3
1.0 k
Modulating
Signal Input
Carrier
Input
V
C
V
S
0.1 F
0.1 F
1.0 k
51
1.0 k
14
5
6
12
1.0 k
23
R
e
V
CC
12 Vdc
2.0 k
+V
o
−V
o
6.8 k
10 k
Carrier Null
5110 k
50 k
V
−
−8.0 Vdc
V
EE
50 50
8
10
4
1
8
10
4
1
51
TEST CIRCUITS
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