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MC74HC161ADG 数据手册 - ON Semiconductor（安森美）
制造商:
ON Semiconductor（安森美）
分类:
逻辑控制器
封装:
SOIC-16
描述:
74HC 系列，ON Semiconductor高速 CMOS 逻辑 工作电压 2.0 － 6.0 兼容性：输入 CMOS、输出 CMOS ### 74HC 系列
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P2Hot
典型应用电路图在P2P12P13
封装尺寸在P14P15
焊盘布局在P14P15
型号编码规则在P1P13P16
标记信息在P1
封装信息在P13
功能描述在P7
技术参数、封装参数在P13
应用领域在P5P12P13
电气规格在P4P5
导航目录
MC74HC161ADG数据手册
Page:
of 16 Go
若手册格式错乱，请下载阅览PDF原文件
MC74HC161A, MC74HC163A
http://onsemi.com
3
MAXIMUM RATINGS
Symbol Parameter Value Unit
V
CC
DC Supply Voltage *0.5 to )7.0 V
V
I
DC Input Voltage *0.5 to V
CC
)0.5 V
V
O
DC Output Voltage (Note 1) *0.5 v V
O
v V
CC
)0.5 V
I
IK
DC Input Diode Current $20 mA
I
OK
DC Output Diode Current $25 mA
I
O
DC Output Sink Current $25 mA
I
CC
DC Supply Current per Supply Pin $50 mA
I
GND
DC Ground Current per Ground Pin $50 mA
T
STG
Storage Temperature Range *65 to )150
_C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds 260
_C
T
J
Junction Temperature Under Bias )150
_C
q
JA
Thermal Resistance PDIP
SOIC
TSSOP
78
112
148
_C/W
P
D
Power Dissipation in Still Air at 85_C PDIP
SOIC
TSSOP
750
500
450
mW
MSL Moisture Sensitivity Level 1
F
R
Flammability Rating Oxygen Index: 30% − 35% UL 94 V−0 @ 0.125 in
V
ESD
ESD Withstand Voltage Human Body Model (Note 2)
Machine Model (Note 3)
u2000
u200
V
I
LATCHUP
Latchup Performance Above V
CC
and Below GND at 85_C (Note 4)
$300 mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. I
O
absolute maximum rating must be observed.
2. Tested to EIA/JESD22−A114−A.
3. Tested to EIA/JESD22−A115−A.
4. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
CC
DC Supply Voltage (Referenced to GND) 2.0 6.0 V
V
in
, V
out
DC Input Voltage, Output Voltage (Referenced to GND) 0 V
CC
V
T
A
Operating Temperature, All Package Types *55 )125
_C
t
r
, t
f
Input Rise and Fall Time (Figure 4) V
CC
= 2.0 V
V
CC
= 3.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
0
0
0
0
1000
600
500
400
ns
5. Unused inputs may not be left open. All inputs must be tied to a high− or low−logic input voltage level.
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