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MC74VHC373MEL 数据手册 - ON Semiconductor（安森美）
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ON Semiconductor（安森美）
分类:
触发器
封装:
SOIC-20
描述:
74系列逻辑芯片/MC74VHC373MEL
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MC74VHC373MEL数据手册
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© Semiconductor Components Industries, LLC, 2014
September, 2014 − Rev. 8
1 Publication Order Number:
MC74VHC373/D
MC74VHC373
Octal D-Type Latch
with 3-State Output
The MC74VHC373 is an advanced high speed CMOS octal latch
with 3−state output fabricated with silicon gate CMOS technology. It
achieves high speed operation similar to equivalent Bipolar Schottky
TTL while maintaining CMOS low power dissipation.
This 8−bit D−type latch is controlled by a latch enable input and an
output enable input. When the output enable input is high, the eight
outputs are in a high impedance state.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V
systems to 3.0 V systems.
Features
• High Speed: t
PD
= 5.0 ns (Typ) at V
CC
= 5.0 V
• Low Power Dissipation: I
CC
= 4.0 mA (Max) at T
A
= 25°C
• High Noise Immunity: V
NIH
= V
NIL
= 28% V
CC
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Designed for 2.0 V to 5.5 V Operating Range
• Low Noise: V
OLP
= 0.9 V (Max)
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300 mA
• ESD Performance: HBM > 2000 V; Machine Model > 200 V
• Chip Complexity: 186 FETs or 46.5 Equivalent Gates
• These Devices are Pb−Free and are RoHS Compliant
PIN ASSIGNMENT
Q2
D1
D0
Q0
OE
GND
Q3
D3
D2
Q1 5
4
3
2
1
10
9
8
7
6
14
15
16
17
18
19
20
11
12
13
Q6
D6
D7
Q7
V
CC
LE
Q4
D4
D5
Q5
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
ORDERING INFORMATION
MARKING
DIAGRAM
SOIC−20
DW SUFFIX
CASE 751D
VHC373
AWLYYWWG
1
20
1
20
VHC373 = Specific Device Code
A = Assembly Location
WL, L = Wafer Lot
Y = Year
WW, W = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
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