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MC9S08GB60ACFUE 数据手册 - Freescale（飞思卡尔）
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Freescale（飞思卡尔）
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MC9S08GB60ACFUE数据手册
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MC9S08GB60A Data Sheet, Rev. 2
Freescale Semiconductor 103
Chapter 7
Internal Clock Generator (S08ICGV2)
The MC9S08GBxxA/GTxxA microcontroller provides one internal clock generation (ICG) module to
create the system bus frequency. All functions described in this section are available on the
MC9S08GBxxA/GTxxA microcontroller. The EXTAL and XTAL pins share port G bits 2 and 1,
respectively. Analog supply lines V
DDA
and V
SSA
are internally derived from the MCU’s V
DD
and V
SS
pins. Electrical parametric data for the ICG may be found in Appendix A, “Electrical Characteristics.”
Figure 7-1. System Clock Distribution Diagram
NOTE
Freescale Semiconductor recommends that flash location $FFBE be
reserved to store a nonvolatile version of ICGTRM. This will allow
debugger and programmer vendors to perform a manual trim operation and
store the resultant ICGTRM value for users to access at a later time.
ATD has min and max
frequency requirements. See
Chapter 1, “Device Overview” and
Appendix A, “Electrical Characteristics.
Flash has frequency
requirements for program
and erase operation.
See Appendix A, “Electrical
Characteristics.
* ICGLCLK is the alternate BDC clock source for the MC9S08GBxxA/GTxxA.
TPM1 TPM2 IIC1 SCI1 SCI2 SPI1
BDC
CPU
ATD1
RAM FLASH
ICG
ICGOUT
÷2
FFE
SYSTEM
LOGIC
BUSCLK
ICGLCLK*
CONTROL
FIXED FREQ CLOCK (XCLK)
ICGERCLK
RTI
÷2
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