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MSP430F2013IPWR 数据手册 - TI（德州仪器）
制造商:
TI（德州仪器）
分类:
微控制器
封装:
TSSOP-14
描述:
TEXAS INSTRUMENTS MSP430F2013IPWR 芯片, 16位微控制器, MSP430系列, 16MHZ, TSSOP-14
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P50P53P54P55P57P58P63P64P65P70P75P76Hot
典型应用电路图在P2
原理图在P6P7P37P49P51P52P54P55P56P58P59P60
封装尺寸在P2P79P80P81P82P84P85P86P87
标记信息在P79P80P81P82
封装信息在P2P79P80P81P82P83P84P85P86P87
技术参数、封装参数在P20
应用领域在P83P94
电气规格在P21
导航目录
MSP430F2013IPWR数据手册
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MSP430F20x3
MSP430F20x2
MSP430F20x1
www.ti.com
SLAS491I –AUGUST 2005–REVISED DECEMBER 2012
Table 25. Port P1 (P1.4 to P1.7) Pin Functions, MSP430F20x2
CONTROL BITS / SIGNALS
(1)(2)
PIN NAME (P1.x) x FUNCTION
P1DIR.x P1SEL.x USIP.x ADC10AE.x INCHx JTAG Mode
P1.4
(3)
input/output 0/1 0 N/A 0 N/A 0
N/A 0 1 N/A 0 N/A 0
SMCLK 1 1 N/A 0 N/A 0
P1.4/SMCLK/A4/
4
VREF+/VeREF+/TCK
A4
(4)
X X N/A 1 4 0
VREF+/VeREF+
(4)(5)
X X N/A 1 N/A 0
TCK
(6)
X X N/A X X 1
P1.5
(3)
input/output 0/1 0 0 0 N/A 0
N/A 0 1 0 0 N/A 0
Timer_A2.TA0 1 1 0 0 N/A 0
P1.5/TA0/SCLK/A5/TMS 5
SCLK X X 1 0 N/A 0
A5
(4)
X X X 1 5 0
TMS
(6)
X X X X X 1
P1.6
(3)
input/output 0/1 0 0 0 N/A 0
Timer_A2.CCI1B 0 1 0 0 N/A 0
Timer_A2.TA1 1 1 0 0 N/A 0
P1.6/TA1/SDO/SCL/A6/TDI 6
SDO (SPI) / SCL (I2C) X X 1 0 N/A 0
A6
(4)
X X X 1 6 0
TDI
(6)
X X X X X 1
P1.7
(3)
input/output 0/1 0 0 0 N/A 0
N/A 0 1 0 0 N/A 0
DVSS 1 1 0 0 N/A 0
P1.7/SDI/SDA/A7/TDO/TDI 7
SDI (SPI) / SDA (I2C) X X 1 0 N/A 0
A7
(4)
X X X 1 7 0
TDO/TDI
(6)(7)
X X X X X 1
(1) X = Don't care
(2) N/A = Not available or not applicable
(3) Default after reset (PUC/POR)
(4) Setting the ADC10AE.x bit disables the output driver and the input Schmitt trigger to prevent parasitic cross currents when applying
analog signals.
(5) The reference voltage is output if bit REFOUT in register ADC10CTL0 is set. An applied voltage is used as positive reference if bits
SREF0/1 in register ADC10CTL0 are set to 10 or 11.
(6) In JTAG mode the internal pullup/down resistors are disabled.
(7) Function controlled by JTAG.
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