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Datasheet 搜索 > 存储芯片 > Micron(镁光) > MT48LC16M16A2P-75:D 数据手册 > MT48LC16M16A2P-75:D 数据手册 10/92 页
MT48LC16M16A2P-75:D
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MT48LC16M16A2P-75:D数据手册
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Figure 2: 32 Meg x 8 Functional Block Diagram
13
RAS#
CAS#
ROW-
ADDRESS
MUX
CLK
CS#
WE#
CKE
CONTROL
LOGIC
COLUMN-
ADDRESS
COUNTER/
LATCH
MODE REGISTER
10
COMMAND
DECODE
A[12:0]
BA[1:0]
DQM
13
ADDRESS
REGISTER
15
1024
(x8)
8192
I/O GATING
DQM MASK LOGIC
READ DATA LATCH
WRITE DRIVERS
COLUMN
DECODER
BANK0
MEMORY
ARRAY
(8192 x 1024 x 8)
BANK0
ROW-
ADDRESS
LATCH
&
DECODER
8192
SENSE AMPLIFIERS
BANK
CONTROL
LOGIC
DQ[7:0]
8
8
DATA
INPUT
REGISTER
DATA
OUTPUT
REGISTER
8
12
BANK1
BANK2
BANK3
13
10
2
1 1
2
REFRESH
COUNTER
256Mb: x4, x8, x16 SDRAM
Functional Block Diagrams
PDF: 09005aef8091e6d1
256Mb_sdr.pdf - Rev. N 1/10 EN
10
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 1999 Micron Technology, Inc. All rights reserved.
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MT48LC16M16A2P-75:D 数据手册

Micron(镁光)
92 页 / 2.52 MByte
Micron(镁光)
87 页 / 3.47 MByte

MT48LC16M16A2P75 数据手册

Micron(镁光)
MICRON  MT48LC16M16A2P-75:D  芯片, SDRAM 256MB
Micron(镁光)
MT48LC16M16A2P-75IT 停产
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