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OPA320SAIDBVR
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OPA320SAIDBVR数据手册
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    
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SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D Trimmed Offset Voltage:
TLC279 . . . 900 µV Max at 25°C,
V
DD
= 5 V
D Input Offset Voltage Drift ...Typically
0.1 µV/Month, Including the First 30 Days
D Wide Range of Supply Voltages Over
Specified Temperature Range:
0°C to 70°C...3 V to 16 V
−40°C to 85°C...4 V to 16 V
−55°C to 125°C...4 V to 16 V
D Single-Supply Operation
D Common-Mode Input Voltage Range
Extends Below the Negative Rail (C-Suffix
and I-Suffix Versions)
D Low Noise ...Typically 25 nV/Hz
at f = 1 kHz
D Output Voltage Range Includes Negative
Rail
D High Input Impedance ...10
12
Typ
D ESD-Protection Circuitry
D Small-Outline Package Option Also
Available in Tape and Reel
D Designed-In Latch-Up Immunity
description
The TLC274 and TLC279 quad operational
amplifiers combine a wide range of input offset
voltage grades with low offset voltage drift, high
input impedance, low noise, and speeds
approaching that of general-purpose BiFET
devices.
These devices use Texas Instruments silicon-
gate LinCMOS technology, which provides
offset voltage stability far exceeding the stability
available with conventional metal-gate
processes.
The extremely high input impedance, low bias
currents, and high slew rates make these
cost-effective devices ideal for applications which
have previously been reserved for BiFET and
NFET products. Four offset voltage grades are
available (C-suffix and I-suffix types), ranging
from the low-cost TLC274 (10 mV) to the high-
precision TLC279 (900 µV). These advantages, in
combination with good common-mode rejection
and supply voltage rejection, make these devices
a good choice for new state-of-the-art designs as
well as for upgrading existing designs.
Copyright 2001, Texas Instruments Incorporated
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1200
Percentage of Units − %
V
IO
− Input Offset Voltage − µV
30
1200
0
600 0 600
5
10
15
20
25
V
DD
= 5 V
T
A
= 25°C
N Package
DISTRIBUTION OF TLC279
INPUT OFFSET VOLTAGE
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1OUT
1IN
1IN+
V
DD
2IN+
2IN
2OUT
4OUT
4IN
4IN+
GND
3IN+
3IN
3OUT
D, J, N, OR PW PACKAGE
(TOP VIEW)
3212019
910111213
4
5
6
7
8
18
17
16
15
14
4IN+
NC
GND
NC
3IN+
1IN+
NC
V
DD
NC
2IN+
FK PACKAGE
(TOP VIEW)
1IN −
1OUT
NC
3OUT
3IN −
4OUT
4IN −
2IN −
2OUT
NC
NC − No internal connection
290 Units Tested From 2 Wafer Lots
LinCMOS is a trademark of Texas Instruments.

OPA320SAIDBVR 数据手册

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