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器件3D模型￥ 93.651
OPA656U 数据手册 - TI（德州仪器）
制造商:
TI（德州仪器）
分类:
运算放大器
封装:
SOIC-8
描述:
TEXAS INSTRUMENTS OPA656U 运算放大器, 单路, 500 MHz, 1个放大器, 290 V/µs, ± 5V 至 ± 6V, SOIC, 8 引脚
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页面导航:
引脚图在P3Hot
典型应用电路图在P19
封装尺寸在P25P27P28
焊盘布局在P23
标记信息在P3P25P26
封装信息在P24P25P26P27P28
技术参数、封装参数在P4P7P13P14P15
应用领域在P1P33
电气规格在P5P6P7P16
型号编号列表在P13
导航目录
OPA656U数据手册
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OPA656
www.ti.com
SBOS196H –DECEMBER 2001–REVISED SEPTEMBER 2015
7.5 Electrical Characteristics
R
F
= 250 Ω, R
L
= 100 Ω, and G = 2 V/V, unless otherwise noted. See Figure 1 for AC performance.
TEST
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
LEVEL
(1)
AC PERFORMANCE (Figure 29)
G = +1 V/V,
V
O
= 200 mV
PP
, T
J
= 25°C
(2)
C 500 MHz
R
F
= 0 Ω
G = +2 V/V,
T
J
= 25°C
(2)
C 200 MHz
V
O
= 200 mV
PP
Small-Signal Bandwidth
G = +5 V/V,
T
J
= 25°C
(2)
C 59 MHz
V
O
= 200 mV
PP
G = +10 V/V,
T
J
= 25°C
(2)
C 23 MHz
V
O
= 200 mV
PP
Gain-Bandwidth Product G > +10 V/V T
J
= 25°C
(2)
C 230 MHz
G = +2 V/V,
Bandwidth for 0.1-dB flatness T
J
= 25°C
(2)
C 30 MHz
V
O
= 200 mV
PP
V
O
< 200 mV
PP
,
Peaking at a Gain of +1 T
J
= 25°C
(2)
C 1.5 dB
R
F
= 0 Ω
G = +2 V/V,
Large-Signal Bandwidth T
J
= 25°C
(2)
C 75 MHz
V
O
= 2 V
PP
G = +2 V/V,
Slew Rate T
J
= 25°C
(2)
C 290 V/µs
1-V Step
Rise-and-Fall Time 0.2-V Step T
J
= 25°C
(2)
C 1.5 ns
G = +2 V/V,
Settling Time to 0.02% T
J
= 25°C
(2)
C 21 ns
V
O
= 2-V Step
Harmonic Distortion G = +2 V/V, f = 5 MHz, V
O
= 2 V
PP
R
L
= 200 Ω T
J
= 25°C
(2)
–71
2nd-Harmonic C dBc
R
L
> 500 Ω T
J
= 25°C
(2)
–74
R
L
= 200 Ω T
J
= 25°C
(2)
–81
3rd-Harmonic C dBc
R
L
> 500 Ω T
J
= 25°C
(2)
–100
Input Voltage Noise f > 100 kHz T
J
= 25°C
(2)
7 nV/√Hz
Input Current Noise f > 100 kHz T
J
= 25°C
(2)
C 1.3 fA/√Hz
G = +2 V/V, PAL,
Differential Gain T
J
= 25°C
(2)
C 0.02%
R
L
= 150 Ω
G = +2 V/V, PAL,
Differential Phase T
J
= 25°C
(2)
C 0.05
R
L
= 150 Ω
DC PERFORMANCE
(3)
T
J
= 25°C
(2)
60 65
V
O
= 0 V,
Open-Loop Voltage Gain (AOL) T
J
= 0°C to +70°C
(4)
A 59 dB
R
L
= 100 Ω
T
J
= –40°C to +85°C
(4)
58
T
J
= 25°C
(2)
±0.25 ±1.8
Input Offset Voltage V
CM
= 0 V T
J
= 0°C to +70°C
(4)
A ±2.2 mV
T
J
= –40°C to +85°C
(4)
±2.6
T
J
= 25°C
(2)
±2 ±12
Average Offset Voltage Drift V
CM
= 0 V T
J
= 0°C to +70°C
(4)
A ±12 µV/°C
T
J
= –40°C to +85°C
(4)
±12
T
J
= 25°C
(2)
±2 ±20
Input Bias Current V
CM
= 0 V T
J
= 0°C to +70°C
(4)
A ±1800 pA
T
J
= –40°C to +85°C
(4)
±5000
T
J
= 25°C
(2)
±2 ±20
Input Bias Current V
CM
= 0 V T
J
= 0°C to +70°C
(4)
A ±1800 pA
T
J
= –40°C to +85°C
(4)
±5000
(1) Test Levels: (A) 100% tested at 25°C. Over temperature limits by characterization and simulation. (B) Limits set by characterization and
simulation. (C) Typical value only for information.
(2) Junction temperature = ambient for 25°C min/max specifications.
(3) Current is considered positive out-of-node. V
CM
is the input common-mode voltage.
(4) Junction temperature = ambient at low temperature limit: junction temperature = ambient +20°C at high temperature limit for over
temperature minimum and maximum specifications.
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