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器件3D模型￥ 13.993
PIC24FJ256GA702-I/MV 数据手册 - Microchip（微芯）
制造商:
Microchip（微芯）
分类:
微控制器
封装:
UQFN-28
描述:
MICROCHIP PIC24FJ256GA702-I/MV. 16-BIT, 16 MIPS, 256KB FLASH, 16KB RAM 28 UQFN 4X4X0.5MM TUBE 98Y9414 新
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P3P4P5P6P7P8P9P10P20P21P22P23Hot
典型应用电路图在P318P319
原理图在P19P36P63P79P125P159P162P163P167P174P176P183
封装尺寸在P377
标记信息在P375P376
封装信息在P358P375P380P381P382P383P384P385P387P389P390P391
功能描述在P3P4P6P8P10P167P173P239P251
技术参数、封装参数在P114P221P359P364P365P366P367P368P370P373
应用领域在P80P81
电气规格在P31P114P126P224P225P328P341
导航目录
PIC24FJ256GA702-I/MV数据手册
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2016 Microchip Technology Inc. DS30010118B-page 23
PIC24FJ256GA705 FAMILY
PGC1 5 2 22 24 I ST ICSP™ Programming Clock
PGC2 22 19 9 10 I ST
PGC3 15 12 42 46 I ST
PGD1 4 1 21 23 I/O DIG/ST ICSP Programming Data
PGD2 21 18 8 9 I/O DIG/ST
PGD3 14 11 41 45 I/O DIG/ST
PMA0 — — 3 3 I/O DIG/ST/
TTL
Parallel Master Port Address<0>/
Address Latch Low
PMA1 — — 2 2 I/O DIG/ST/
TTL
Parallel Master Port Address<1>/
Address Latch High
PMA2 — — 12 13 I/O DIG/ST/
TTL
Parallel Master Port Address<2>
PMA3 — — 38 41 I/O DIG/ST/
TTL
Parallel Master Port Address<3>
PMA4 — — 37 40 I/O DIG/ST/
TTL
Parallel Master Port Address<4>
PMA5 — — 4 4 I/O DIG/ST/
TTL
Parallel Master Port Address<5>
PMA6 — — 5 5 I/O DIG/ST/
TTL
Parallel Master Port Address<6>
PMA7 — — 13 14 I/O DIG/ST/
TTL
Parallel Master Port Address<7>
PMA8 — — 32 35 I/O DIG/ST/
TTL
Parallel Master Port Address<8>
PMA9 — — 35 38 I/O DIG/ST/
TTL
Parallel Master Port Address<9>
PMA14/PMCS/
PMCS1
— — 15 16 I/O DIG/ST/
TTL
Parallel Master Port Address<14>/
Slave Chip Select/Chip Select 1 Strobe
TABLE 1-3: PIC24FJ256GA705 FAMILY PINOUT DESCRIPTIONS (CONTINUED)
Pin
Function
Pin Number/Grid Locator
I/O
Input
Buffer
Description
28-Pin SOIC,
SSOP, SPDIP
28-Pin QFN,
UQFN
44-Pin
TQFP
48-Pin
QFN/TQFP
Legend: TTL = TTL input buffer ST = Schmitt Trigger input buffer
ANA = Analog level input/output I
2
C = I
2
C/SMBus input buffer
DIG = Digital input/output XCVR = Dedicated Transceiver
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