Datasheet 搜索 > 微控制器 > Microchip（微芯） > PIC24FJ256GA702-I/MV 数据手册 > PIC24FJ256GA702-I/MV 数据手册 3/412 页
器件3D模型￥ 13.993
PIC24FJ256GA702-I/MV 数据手册 - Microchip（微芯）
制造商:
Microchip（微芯）
分类:
微控制器
封装:
UQFN-28
描述:
MICROCHIP PIC24FJ256GA702-I/MV. 16-BIT, 16 MIPS, 256KB FLASH, 16KB RAM 28 UQFN 4X4X0.5MM TUBE 98Y9414 新
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P3P4P5P6P7P8P9P10P20P21P22P23Hot
典型应用电路图在P318P319
原理图在P19P36P63P79P125P159P162P163P167P174P176P183
封装尺寸在P377
标记信息在P375P376
封装信息在P358P375P380P381P382P383P384P385P387P389P390P391
功能描述在P3P4P6P8P10P167P173P239P251
技术参数、封装参数在P114P221P359P364P365P366P367P368P370P373
应用领域在P80P81
电气规格在P31P114P126P224P225P328P341
导航目录
PIC24FJ256GA702-I/MV数据手册
Page:
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若手册格式错乱，请下载阅览PDF原文件
2016 Microchip Technology Inc. DS30010118B-page 3
PIC24FJ256GA705 FAMILY
Pin Diagrams (PIC24FJ256GA702 Devices)
Legend: See Table 1 for a complete description of pin functions. Pinouts are subject to change.
Note: Gray shading indicates 5.5V tolerant input pins.
28-Pin QFN, UQFN
10 11
2
3
6
1
18
19
12 13 14
15
8
7
16
17
232425262728
9
PIC24FJ256GA702
5
4
MCLR
AVDD/VDD
AVSS/VSS
VSS
VDD
VSS
VCAP
RB1220
21
22
RB0
RB1
RB2
RB3
RA2
RA3
RB4
RA4
RB5
RB6
RB7
RB8
RB9
RB10
RB11
RB13
RB14
RB15
RA0
RA1
TABLE 1: COMPLETE PIN FUNCTION DESCRIPTIONS (
PIC24FJ256GA702 QFN, UQFN
)
Pin Function Pin Function
1 PGD1/AN2/CTCMP/C2INB/RP0/RB0 15 TDO/C1INC/C2INC/C3INC/TMPRN
/RP9/SDA1/T1CK/CTED4/RB9
2 PGC1/AN1-/AN3/C2INA/RP1/CTED12/RB1 16 Vss
3 AN4/C1INB/RP2/SDA2/CTED13/RB2 17 V
CAP
4 AN5/C1INA/RP3/SCL2/CTED8/RB3 18 PGD2/TDI/RP10/OCM1C/CTED11/RB10
5 Vss 19 PGC2/TMS/REFI1/RP11/CTED9/RB11
6 OSCI/CLKI/C1IND/RA2 20 AN8/LVDIN/RP12/RB12
7 OSCO/CLKO/C2IND/RA3 21 AN7/C1INC/RP13/OCM1D/CTPLS/RB13
8SOSCI/RP4/RB4 22 CV
REF/AN6/C3INB/RP14/CTED5/RB14
9 SOSCO/PWRLCLK/RA4 23 AN9/C3INA/RP15/CTED6/RB15
10 V
DD 24 AVSS/VSS
11 PGD3/RP5/ASDA1/OCM1E/RB5 25 AVDD/VDD
12 PGC3/RP6/ASCL1/OCM1F/RB6 26 MCLR
13 RP7/OCM1A/CTED3/INT0/RB7 27 VREF+/CVREF+/AN0/C3INC/RP26/CTED1/RA0
14 TCK/RP8/SCL1/OCM1B/CTED10/RB8 28 V
REF-/CVREF-/AN1/C3IND/RP27/CTED2/RA1
Legend: RPn represents remappable pins for Peripheral Pin Select (PPS) functions.
Note: Pinouts are subject to change.
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