Datasheet 搜索 > 32位控制器 > Microchip（微芯） > PIC32MX110F016B-I/SS 数据手册 > PIC32MX110F016B-I/SS 数据手册 169/350 页
器件3D模型￥ 17.263
PIC32MX110F016B-I/SS 数据手册 - Microchip（微芯）
制造商:
Microchip（微芯）
分类:
32位控制器
封装:
SSOP-28
描述:
MICROCHIP PIC32MX110F016B-I/SS 芯片, 微控制器, 32位, PIC32, 40MHZ, SSOP-28
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P4P20P21P22P23P24P25P26P28P132P245P246Hot
典型应用电路图在P31
原理图在P19P37P63P67P87P131P147P151P152P157P161P165
封装尺寸在P317P335
标记信息在P315P316P335
封装信息在P262P315P318P320P321P322P332P335P337P348
功能描述在P41P131P185P193
技术参数、封装参数在P233P234P235P263P267P268P269P271P272P273P275P293
电气规格在P28P32P214P233P234P235P269P302P335P336P337P338
导航目录
PIC32MX110F016B-I/SS数据手册
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2011-2019 Microchip Technology Inc. DS60001168L-page 169
PIC32MX1XX/2XX 28/36/44-PIN FAMILY
17.0 SERIAL PERIPHERAL
INTERFACE (SPI)
The SPI module is a synchronous serial interface that
is useful for communicating with external peripherals
and other microcontrollers. These peripheral devices
may be Serial EEPROMs, Shift registers, display driv-
ers, Analog-to-Digital Converters (ADC), etc. The
PIC32 SPI module is compatible with Motorola
®
SPI
and SIOP interfaces.
Some of the key features of the SPI module are:
• Master mode and Slave mode support
• Four clock formats
• Enhanced Framed SPI protocol support
• User-configurable 8-bit, 16-bit and 32-bit data width
• Separate SPI FIFO buffers for receive and transmit
- FIFO buffers act as 4/8/16-level deep FIFOs
based on 32/16/8-bit data width
• Programmable interrupt event on every 8-bit,
16-bit and 32-bit data transfer
• Operation during Sleep and Idle modes
• Audio Codec Support:
-I
2
S protocol
- Left-justified
- Right-justified
-PCM
FIGURE 17-1: SPI MODULE BLOCK DIAGRAM
Note: This data sheet summarizes the features
of the PIC32MX1XX/2XX 28/36/44-pin
Family of devices. It is not intended to be
a comprehensive reference source. To
complement the information in this data
sheet, refer to Section 23. “Serial
Peripheral Interface (SPI)”
(DS60001106), which is available from the
Documentation > Reference Manual
section of the Microchip PIC32 web site
(www.microchip.com/pic32).
Internal
Data Bus
SDIx
SDOx
SSx
/F
SYNC
SCKx
SPIxSR
bit 0
Shift
Control
Edge
Select
MSTEN
Baud Rate
Slave Select
Sync Control
Clock
Control
Transmit
Receive
and Frame
Note: Access SPIxTXB and SPIxRXB FIFOs via SPIxBUF register.
FIFOs Share Address SPIxBUF
SPIxBUF
Generator
PBCLK
WriteRead
SPIxTXB FIFO
SPIxRXB FIFO
REFCLK
MCLKSEL
1
0
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