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器件3D模型￥ 16.04
PIC32MX570F512H-V/MR 数据手册 - Microchip（微芯）
制造商:
Microchip（微芯）
分类:
32位控制器
封装:
QFN-64
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P26Hot
典型应用电路图在P33
原理图在P13P35P51P67P73P83P127P157P161P162P167P171
封装尺寸在P368
标记信息在P367
封装信息在P316P367P369P371P373P374P375P384
技术参数、封装参数在P287P288P289P317P321P322P325P326P327P329P347P348
电气规格在P26P30P230P287P288P289P323P356
导航目录
PIC32MX570F512H-V/MR数据手册
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2014 Microchip Technology Inc. Preliminary DS60001290C-page 1
PIC32MX1XX/2XX/5XX 64/100-PIN
Operating Conditions
• 2.3V to 3.6V, -40ºC to +105ºC (DC to 40 MHz),
-40ºC to +85ºC (DC to 50 MHz)
Core: 50 MHz/83 DMIPS MIPS32
®
M4K
®
• MIPS16e
®
mode for up to 40% smaller code size
• Code-efficient (C and Assembly) architecture
• Single-cycle (MAC) 32x16 and two-cycle 32x32 multiply
Clock Management
• 0.9% internal oscillator
• Programmable PLLs and oscillator clock sources
• Fail-Safe Clock Monitor (FSCM)
• Independent Watchdog Timer
• Fast wake-up and start-up
Power Management
• Low-power management modes (Sleep and Idle)
• Integrated Power-on Reset, Brown-out Reset, and High
Voltage Detect
• 0.5 mA/MHz dynamic current (typical)
•44 μA IPD current (typical)
Audio/Graphics/Touch HMI Features
• External graphics interface with up to 34 PMP pins
• Audio data communication: I
2
S, LJ, RJ, USB
• Audio data control interface: SPI and I
2
C™
• Audio data master clock:
- Generation of fractional clock frequencies
- Can be synchronized with USB clock
- Can be tuned in run-time
• Charge Time Measurement Unit (CTMU):
- Supports mTouch™ capacitive touch sensing
- Provides high-resolution time measurement (1 ns)
Advanced Analog Features
• ADC Module:
- 10-bit 1 Msps rate with one Sample and Hold (S&H)
- Up to 48 analog inputs
- Can operate during Sleep mode
• Flexible and independent ADC trigger sources
• On-chip temperature measurement capability
• Comparators:
- Three dual-input Comparator modules
- Programmable reference with 32 voltage points
Timers/Output Compare/Input Capture
• Five General Purpose Timers:
- Five 16-bit and up to two 32-bit Timers/Counters
• Five Output Compare (OC) modules
• Five Input Capture (IC) modules
• Peripheral Pin Select (PPS) to allow function remap
• Real-Time Clock and Calendar (RTCC) module
Communication Interfaces
• USB 2.0-compliant Full-speed OTG controller
• Up to five UART modules (12.5 Mbps):
- LIN 1.2 protocols and IrDA
®
support
• Four 4-wire SPI modules (25 Mbps)
•Two I
2
C modules (up to 1 Mbaud) with SMBus support
• PPS to allow function remap
• Parallel Master Port (PMP) with dual read/write buffers
• Controller Area Network (CAN) 2.0B Compliant with
DeviceNet™ addressing support
Direct Memory Access (DMA)
• Four channels of hardware DMA with automatic data
size detection
• 32-bit Programmable Cyclic Redundancy Check (CRC)
• Two additional channels dedicated to USB
• Two additional channels dedicated to CAN
Input/Output
• 10 mA or 15 mA source/sink for standard VOH/VOL and
up to 22
mA for non-standard VOH
1
• 5V-tolerant pins
• Selectable open drain, pull-ups, and pull-downs
• External interrupts on all I/O pins
Qualification and Class B Support
• AEC-Q100 REVG (Grade 2 -40ºC to +105ºC) planned
• Class B Safety Library, IEC 60730
Debugger Development Support
• In-circuit and in-application programming
•4-wire MIPS
®
Enhanced JTAG interface
• Unlimited program and six complex data breakpoints
• IEEE 1149.2-compatible (JTAG) boundary scan
Packages
Type QFN TQFP TFBGA (see Note 1)
Pin Count 64 64 100 100 100
I/O Pins (up to) 53 53 85 85 85
Contact/Lead Pitch 0.50 mm 0.50 mm 0.40 mm 0.50 mm 0.65 mm
Dimensions 9x9x0.9 mm 10x10x1 mm 12x12x1 mm 14x14x1 mm 7x7x1.2 mm
Note 1: Please contact your local Microchip Sales Office for information regarding the availability of devices in the 100-pin TFBGA package.
32-bit Microcontrollers (up to 512 KB Flash and 64 KB SRAM) with
Audio/Graphics/Touch (HMI), CAN, USB, and Advanced Analog
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