Datasheet 搜索 > 微控制器 > Microchip（微芯） > PIC32MX575F256L-80I/PT 数据手册 > PIC32MX575F256L-80I/PT 数据手册 171/441 页
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PIC32MX575F256L-80I/PT 数据手册 - Microchip（微芯）
制造商:
Microchip（微芯）
分类:
微控制器
封装:
TQFP-100
描述:
MICROCHIP PIC32MX575F256L-80I/PT 微控制器, 32位, 人机接口, PIC32, 80 MHz, 256 KB, 64 KB, 100 引脚, TQFP
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引脚图在P38P423P428P431Hot
原理图在P25P41P69P95P101P111P157P167P171P172P177P181
封装尺寸在P403P430
标记信息在P401P402P430
封装信息在P2P3P4P352P401P403P404P405P407P409P410P411
功能描述在P47P221P279P323P327P333
技术参数、封装参数在P353P360P361P362P364P365P366P368P386P388P389P397
电气规格在P38P158P362P397P421P425P428P429P430P432
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PIC32MX575F256L-80I/PT数据手册
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2009-2016 Microchip Technology Inc. DS60001156J-page 171
PIC32MX5XX/6XX/7XX
14.0 TIMER2/3, TIMER4/5
This family of PIC32 devices features four synchronous
16-bit timers (default) that can operate as a free-
running interval timer for various timing applications
and counting external events. The following modes are
supported:
• Synchronous Internal 16-bit Timer
• Synchronous Internal 16-bit Gated Timer
• Synchronous External 16-bit Timer
Two 32-bit synchronous timers are available by
combining Timer2 with Timer3 and Timer4 with Timer5.
The 32-bit timers can operate in three modes:
• Synchronous Internal 32-bit Timer
• Synchronous Internal 32-bit Gated Timer
• Synchronous External 32-bit Timer
14.1 Additional Supported Features
• Selectable clock prescaler
• Timers operational during CPU idle
• Time base for Input Capture and Output Compare
modules (only Timer2 and Timer3)
• ADC event trigger (only Timer3)
• Fast bit manipulation using CLR, SET and INV
registers
FIGURE 14-1: TIMER2/3 AND TIMER4/5 BLOCK DIAGRAM (16-BIT)
Note: This data sheet summarizes the features
of the PIC32MX5XX/6XX/7XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 14. “Timers”
(DS60001105) of the “PIC32 Family Ref-
erence Manual”, which is available from
the Microchip web site (www.micro-
chip.com/PIC32).
Note: In this chapter, references to registers,
TxCON, TMRx and PRx, use ‘x’ to
represent Timer2 through Timer5 in 16-bit
modes. In 32-bit modes, ‘x’ represents
Timer2 or Timer4; ‘y’ represents Timer3 or
Timer5.
Sync
PRx
TxIF
Equal
Comparator x 16
TMRx
Reset
Event Flag
Q
Q
D
TGATE (TxCON<7>)
1
0
Gate
TxCK
(2)
Sync
ON (TxCON<15>)
TGATE (TxCON<7>)
TCS (TxCON<1>)
TCKPS (TxCON<6:4>)
Prescaler
3
1, 2, 4, 8, 16,
32, 64, 256
x 1
1 0
0 0
PBCLK
Trigger
(1)
ADC Event
Note 1: ADC event trigger is only available on Timer3.
2: TxCK pins are not available on 64-pin devices.
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