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SN65HVD72DRBR
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SN65HVD72
,
SN65HVD75
,
SN65HVD78
www.ti.com
SLLSE11D MARCH 2012REVISED JULY 2015
7 Specifications
7.1 Absolute Maximum Ratings
over recommended operating range (unless otherwise specified)
(1)
MIN MAX UNIT
Supply voltage, V
CC
–0.5 5.5
Voltage at A or B inputs –13 16.5
V
Input voltage at any logic pin –0.3 5.7
Voltage input, transient pulse, A and B, through 100 Ω –100 100
Receiver output current –24 24 mA
Junction temperature, T
J
170 °C
Continuous total power dissipation See Power Dissipation
Storage temperature, T
stg
–65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.2 ESD Ratings
VALUE UNIT
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins
(1)
±8000
Charged device model (CDM), per JEDEC specification JESD22-C101, all ±1500
pins
(2)
JEDEC Standard 22, Test Method A115 (Machine Model), all pins ±300
Electrostatic
V
(ESD)
V
discharge IEC 61000-4-2 ESD (Air-Gap Discharge), bus pins and GND
(3)
±12000
IEC 61000-4-2 ESD (Contact Discharge), bus pins and GND ±12000
IEC 61000-4-4 EFT (Fast transient or burst) bus pins and GND ±4000
IEC 60749-26 ESD (Human Body Model), bus pins and GND ±15000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
(3) By inference from contact discharge results, see Application and Implementation.
7.3 Recommended Operating Conditions
MIN NOM MAX UNIT
V
CC
Supply voltage 3 3.3 3.6 V
V
I
Input voltage at any bus terminal (separately or common mode)
(1)
–7 12 V
V
IH
High-level input voltage (driver, driver enable, and receiver enable inputs) 2 V
CC
V
V
IL
Low-level input voltage (driver, driver enable, and receiver enable inputs) 0 0.8 V
V
ID
Differential input voltage –12 12 V
I
O
Output current, driver –60 60 mA
I
O
Output current, receiver –8 8 mA
R
L
Differential load resistance 54 60 Ω
C
L
Differential load capacitance 50 pF
SN65HVD72 250 kbps
1/t
UI
Signaling rate SN65HVD75 20 Mbps
SN65HVD78 50 Mbps
T
A
(2)
Operating free-air temperature (See Thermal Information) –40 125 °C
T
J
Junction temperature –40 150 °C
(1) The algebraic convention, in which the least positive (most negative) limit is designated as minimum, is used in this data sheet.
(2) Operation is specified for internal (junction) temperatures up to 150°C. Self-heating due to internal power dissipation should be
considered for each application. Maximum junction temperature is internally limited by the thermal shutdown (TSD) circuit which disables
the driver outputs when the junction temperature reaches 170°C.
Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback 5
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SN65HVD72DRBR 数据手册

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