Datasheet 搜索 > 逻辑控制器 > TI（德州仪器） > SN74CB3Q3257PWR 数据手册 > SN74CB3Q3257PWR 数据手册 1/25 页
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SN74CB3Q3257PWR 数据手册 - TI（德州仪器）
制造商:
TI（德州仪器）
分类:
逻辑控制器
封装:
TSSOP-16
描述:
TEXAS INSTRUMENTS SN74CB3Q3257PWR. 芯片, 多路复用器/分离器, 1:2四路FET, TSSOP-16, 整卷
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封装信息在P12P13P14P15P16
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SN74CB3Q3257PWR数据手册
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1B11A
OE
1B2
SW
SW
2B12A
2B2
SW
SW
3B13A
3B2
SW
SW
4B14A
4B2
SW
SW
S
4
7
9
12
1
15
2
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SN74CB3Q3257
SCDS135B –SEPTEMBER 2003–REVISED JUNE 2015
SN74CB3Q3257 4-Bit 1-of-2 FET Multiplexer/Demultiplexer
2.5-V/3.3-V Low-Voltage High-Bandwidth Bus Switch
1 Features 2 Applications
1
• High-Bandwidth Data Path
• IP Phones: Wired and Wireless
(up to 500 MHz)
• Optical Modules
• 5-V Tolerant I/Os With Device Powered Up or
• Optical Networking: Video Over Fiber and EPON
Powered Down
• Private Branch Exchange (PBX)
• Low and Flat ON-State Resistance (r
on
)
• WiMAX and Wireless Infrastructure Equipment
Characteristics Over Operating Range
(r
on
= 4 Ω Typical)
3 Description
• Rail-to-Rail Switching on Data I/O Ports
The SN74CB3Q3257 device is a high-bandwidth FET
bus switch utilizing a charge pump to elevate the gate
– 0- to 5-V Switching With 3.3-V V
CC
voltage of the pass transistor, providing a low and flat
– 0- to 3.3-V Switching With 2.5-V V
CC
ON-state resistance (r
on
).
• Bidirectional Data Flow With Near-Zero
Propagation Delay
Device Information
(1)
• Low Input and Output Capacitance Minimizes
PART NUMBER PACKAGE BODY SIZE (NOM)
Loading and Signal Distortion
SN74CB3Q3257D SOIC (16) 9.90 mm × 3.91 mm
(C
io(OFF)
= 3.5 pF Typical)
SN74CB3Q3257DB SSOP (6) 6.20 mm × 5.30 mm
• Fast Switching Frequency (f
OE
= 20 MHz
SN74CB3Q3257DGV TVSOP (16) 3.60 mm × 4.40 mm
Maximum)
SN74CB3Q3257DBQ SSOP (16) 4.90 mm × 3.90 mm
• Data and Control Inputs Provide Undershoot
SN74CB3Q3257PW TSSOP (16) 5.00 mm × 4.40 mm
Clamp Diodes
SN74CB3Q3257RGY VQFN (16) 4.00 mm × 3.50 mm
• Low Power Consumption
(1) For all available packages, see the orderable addendum at
(I
CC
= 0.7 mA Typical)
the end of the data sheet.
• V
CC
Operating Range From 2.3 V to 3.6 V
Logic Diagram (Positive Logic)
• Data I/Os Support 0- to 5-V Signaling Levels
(0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V)
• Control Inputs Can Be Driven by TTL or
5-V/3.3-V CMOS Outputs
• I
off
Supports Partial-Power-Down Mode Operation
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Performance Tested Per JESD 22
– 2000-V Human Body Model
(A114-B, Class II)
– 1000-V Charged-Device Model (C101)
• Supports Both Digital and Analog Applications:
USB Interface, Differential Signal Interface,
Bus Isolation, Low-Distortion Signal Gating
(1)
(1) For additional information regarding the performance
characteristics of the CB3Q family, refer to the TI application
report, CBT-C, CB3T, and CB3Q Signal-Switch Families,
SCDA008.
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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