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器件3D模型￥ 1.155
SN74HCT125N 数据手册 - TI（德州仪器）
制造商:
TI（德州仪器）
分类:
逻辑控制器
封装:
DIP-14
描述:
具有三态输出翻两番总线缓冲器GATES QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS
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SN74HCT125N数据手册
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5
Switching Specifications Input t
r
, t
f
= 6ns
PARAMETER SYMBOL
TEST
CONDITIONS V
CC
(V)
25
o
C -40
o
C TO 85
o
C -55
o
C TO 125
o
C
UNITSTYP MAX MAX MAX
HC TYPES
Propagation Delay Time
nA to nY
t
PLH
, t
PHL
C
L
= 50pF 2 - 100 125 150 ns
4.5 - 20 25 30 ns
C
L
= 15pF 5 8 - - - ns
CL = 50pF 6 - 17 21 26 ns
Enable Delay Time t
PZL,
t
PZH
C
L
= 50pF 2 - 125 155 190 ns
4.5 - 25 31 38 ns
C
L
= 15pF 5 10 - - - ns
CL = 50pF 6 - 21 26 32 ns
Disable Delay Time t
PLZ
, t
PHZ
CL = 50pF 2 - 125 155 190 ns
C
L
= 50pF 4.5 - 25 31 38 ns
C
L
= 15pF 5 10 - - - ns
CL = 50pF 6 - 21 26 32 ns
Output Transition Time t
TLH
, t
THL
C
L
= 50pF 2 - 60 75 90 ns
4.5 - 12 15 18 ns
6 - 10 13 15 ns
Input Capacitance C
I
---1010 10pF
Three-State Output
Capacitance
C
O
---2020 20pF
Power Dissipation
Capacitance
(Notes 3, 4)
C
PD
- 5 29 - - - pF
HCT TYPES
Propagation Delay Time
nA to nY
t
PLH
, t
PHL
C
L
= 50pF 4.5 - 25 31 38 ns
C
L
= 15pF 5 10 - - - ns
Output Enable Time t
PZL,
t
PZH
C
L
= 50pF 4.5 - 25 31 38 ns
C
L
= 15pF 5 10 - - - ns
Output Disabling Time t
PLZ
, t
PHZ
C
L
= 50pF 4.5 - 28 35 42 ns
C
L
= 15pF 5 11 - - - ns
Output Transition Times t
TLH
, t
THL
C
L
= 50pF 4.5 - 12 15 18 ns
Input Capacitance C
I
---1010 10pF
Three-State Output
Capacitance
C
O
---2020 20pF
Power Dissipation
Capacitance
(Notes 3, 4)
C
PD
- 5 34 - - - pF
NOTES:
3. C
PD
is used to determine the dynamic power consumption, per channel.
4. P
D
= V
CC
2
f
i
(C
PD
+ C
L
) where f
i
= Input Frequency, f
O
= Output Frequency, C
L
= Output Load Capacitance, V
CC
= Supply Voltage.
CD54HC125, CD74HC125, CD54HCT125, CD74HCT125
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