Datasheet 搜索 > muRata（村田） > STM8S207RBT6 数据手册 > STM8S207RBT6 数据手册 1/117 页
￥ 0
STM8S207RBT6 数据手册 - muRata（村田）
制造商:
muRata（村田）
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P23P24P25P26P27P28P29P30P31P32P33Hot
典型应用电路图在P84P87
原理图在P12
封装尺寸在P23P92
型号编码规则在P112
封装信息在P91P92P93P94P95P96P97P98P99P100P101P102
功能描述在P13P14P15P16P17P18P19P20P21P22
技术参数、封装参数在P54P89
电气规格在P52P53P54P55P56P57P58P59P60P61P62P63
导航目录
STM8S207RBT6数据手册
Page:
of 117 Go
若手册格式错乱，请下载阅览PDF原文件
This is information on a product in full production.
February 2015 DocID14733 Rev 13 1/117
STM8S207xx STM8S208xx
Performance line, 24 MHz STM8S 8-bit MCU, up to 128 KB Flash,
integrated EEPROM, 10-bit ADC, timers, 2 UARTs, SPI, I²C, CAN
Datasheet - production data
Features
Core
–Max f
CPU
: up to 24 MHz, 0 wait states @
f
CPU
16 MHz
– Advanced STM8 core with Harvard
architecture and 3-stage pipeline
– Extended instruction set
– Max 20 MIPS @ 24 MHz
Memories
– Program: up to 128 Kbytes Flash; data
retention 20 years at 55 °C after 10 kcycles
–Data: up to 2 Kbytes true data EEPROM;
endurance 300 kcycles
– RAM: up to 6 Kbytes
Clock, reset and supply management
– 2.95 to 5.5 V operating voltage
– Low power crystal resonator oscillator
– External clock input
– Internal, user-trimmable 16 MHz RC
– Internal low power 128 kHz RC
– Clock security system with clock monitor
– Wait, active-halt, & halt low power modes
– Peripheral clocks switched off individually
– Permanently active, low consumption
power-on and power-down reset
Interrupt management
– Nested interrupt controller with 32
interrupts
– Up to 37 external interrupts on 6 vectors
Timers
– 2x 16-bit general purpose timers, with 2+3
CAPCOM channels (IC, OC or PWM)
– Advanced control timer: 16-bit, 4 CAPCOM
channels, 3 complementary outputs, dead-
time insertion and flexible synchronization
– 8-bit basic timer with 8-bit prescaler
– Auto wakeup timer
– Window watchdog, independent watchdog
Communications interfaces
– High speed 1 Mbit/s active beCAN 2.0B
– UART with clock output for synchronous
operation - LIN master mode
– UART with LIN 2.1 compliant, master/slave
modes and automatic resynchronization
– SPI interface up to 10 Mbit/s
–I
2
C interface up to 400 Kbit/s
10-bit ADC with up to 16 channels
I/Os
– Up to 68 I/Os on an 80-pin package
including 18 high sink outputs
– Highly robust I/O design, immune against
current injection
– Development support
– Single wire interface module (SWIM) and
debug module (DM)
96-bit unique ID key for each device
Table 1. Device summary
Reference Part number
STM8S207xx
STM8S207MB, STM8S207M8, STM8S207RB,
STM8S207R8, STM8S207R6, STM8S207CB,
STM8S207C8, STM8S207C6, STM8S207SB,
STM8S207S8, STM8S207S6, STM8S207K8,
STM8S207K6
STM8S208xx
STM8S208MB, STM8S208RB, STM8S208R8,
STM8S208R6, STM8S208CB, STM8S208C8,
STM8S208C6, STM8S208SB, STM8S208S8,
STM8S208S6
LQFP80
LQFP64
LQFP32
LQFP44
LQFP64
LQFP48
7 x 7 mm 10 x 10mm
7 x 7 mm
14 x 14 mm
14 x 14 mm 10 x 10 mm
www.st.com
器件 Datasheet 文档搜索
AiEMA 数据库涵盖高达 72,405,303 个元件的数据手册，每天更新 5,000 多个 PDF 文件
