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器件3D模型￥ 38.545
TMS320F28032PNS 数据手册 - TI（德州仪器）
制造商:
TI（德州仪器）
分类:
微控制器
封装:
LQFP-80
描述:
Piccolo微处理器 Piccolo Microcontrollers
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P9P78Hot
典型应用电路图在P48P94
原理图在P3P76P91P96P105P108P110P124P126P129
封装尺寸在P156P157P158
标记信息在P156P157P158P159
封装信息在P2P150P156P157P158P159
技术参数、封装参数在P21P22P23P24P25P26P27P28P29P30P31P32
应用领域在P1P67P123P127P144
电气规格在P27P45P64P83P92
型号编号列表在P110
导航目录
TMS320F28032PNS数据手册
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3 External Interrupts
M0
SARAM 1K × 16
(0-wait)
16-Bit Peripheral Bus
SPISTEx
M1
SARAM 1K × 16
(0-wait)
eCAN
(32-mail
box)
SCI
(4L FIFO)
ePWM
SPI
(4L FIFO)
I2C
(4L FIFO)
LIN
HRPWM
32-Bit Peripheral Bus
GPIO MUX
C28x
32-Bit CPU
A7:0
B7:0
PIE
CPU Timer 0
CPU Timer 1
CPU Timer 2
TCK
TDI
TMS
TDO
TRST
OSC1,
OSC2,
Ext,
PLL,
LPM,
WD
XCLKIN
X2
XRS
32-Bit Peripheral Bus
(CLA-Accessible)
eCAP
ECA Px
EPW Mx A
EPW Mx B
CA NTXx
CANR Xx
SDA x
SCL x
SPISIMO x
SPISOMIx
SPIC LK x
COMP1OUT
SCIR XDx
GPIO
Mux
LPM Wakeup
CLA
ADC
Boot-ROM
8K × 16
(0-wait)
SARAM
4K/6K/
8K × 16
(CLA Only on
28033 and 28035)
(0-wait)
Secure
L INA RX
LI NAT X
COMP
COMP1A
COMP1B
COMP2A
COMP2B
COMP3A
COMP3B
COMP2OUT
COMP3OUT
eQEP
EQ EPxA
EQ EPxB
EQE PxI
EQEPxS
SCIT XD x
X1
GPIO
MUX
AIO
MUX
From
COMP1OUT,
COMP2OUT,
COMP3OUT
VREG
POR/
BOR
Memory Bus
CLA Bus
Memory Bus
Memory Bus
TZx
PSWD
FLASH
16K/32K/64K × 16
Secure
OTP/Flash
Wrapper
OTP 1K × 16
Secure
Code
Security
Module
HRCAP
HRCAPx
EPWMSYNCI
EPWMSYNCO
Copyright © 2016, Texas Instruments Incorporated
32-Bit Peripheral Bus
(CLA-Accessible)
3
TMS320F28030
,
TMS320F28031
,
TMS320F28032
TMS320F28033
,
TMS320F28034
,
TMS320F28035
www.ti.com
SPRS584K –APRIL 2009–REVISED JUNE 2016
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Product Folder Links: TMS320F28030 TMS320F28031 TMS320F28032 TMS320F28033 TMS320F28034
TMS320F28035
Device OverviewCopyright © 2009–2016, Texas Instruments Incorporated
1.4 Functional Block Diagram
Figure 1-1 shows the functional block diagram for the device.
A. Not all peripheral pins are available at the same time due to multiplexing.
Figure 1-1. Functional Block Diagram
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